Issued Patents All Time
Showing 26–42 of 42 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10896703 | Memory device with an input signal management mechanism | Scott E. Smith | 2021-01-19 |
| 10872658 | Reduced shifter memory system | Jason M. Brown, William C. Waldrop, Kallol Mazumder, Byung S. Moon, Ravi Kiran Kandikonda | 2020-12-22 |
| 10783980 | Methods for parity error synchronization and memory devices and systems employing the same | William C. Waldrop | 2020-09-22 |
| 10770116 | Memory device with a signaling mechanism | Liang Chen | 2020-09-08 |
| 10714156 | Apparatuses and method for trimming input buffers based on identified mismatches | Christian Mohr, Jennifer E. Taylor | 2020-07-14 |
| 10699768 | Apparatuses and methods for command signal delay | Jason M. Brown | 2020-06-30 |
| 10684797 | Command-in-pipeline counter for a memory device | — | 2020-06-16 |
| 10622052 | Reduced peak self-refresh current in a memory device | — | 2020-04-14 |
| 10475488 | Memory device with an input signal management mechanism | Scott E. Smith | 2019-11-12 |
| 10395702 | Memory device with a clocking mechanism | Jason M. Brown, Todd A. Dauenbaugh | 2019-08-27 |
| 10395701 | Memory device with a latching mechanism | Michael V. Ho | 2019-08-27 |
| 10373654 | Memory device with a signaling mechanism | Liang Chen | 2019-08-06 |
| 10354717 | Reduced shifter memory system | Jason M. Brown, William C. Waldrop, Kallol Mazumder, Byung S. Moon, Ravi Kiran Kandikonda | 2019-07-16 |
| 10083723 | Apparatuses and methods for sharing transmission vias for memory devices | — | 2018-09-25 |
| 10002647 | Apparatuses and methods for sharing transmission vias for memory devices | — | 2018-06-19 |
| 9329623 | Apparatuses, integrated circuits, and methods for synchronizing data signals with a command signal | — | 2016-05-03 |
| 8958256 | Apparatuses and methods for improved memory operation times | Gary L. Howe, John A. Winegard, Vipul Surlekar | 2015-02-17 |