Issued Patents All Time
Showing 25 most recent of 35 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11908509 | Apparatus with input signal quality feedback | John E. Riley, Scott E. Smith, Gary L. Howe | 2024-02-20 |
| 11854651 | Systems and methods for improved dual-tail latch with wide input common mode range | — | 2023-12-26 |
| 11855812 | Hybrid loop unrolled decision feedback equalizer architecture | Won Joo Yun | 2023-12-26 |
| 11810641 | Apparatuses and method for trimming input buffers based on identified mismatches | Christian Mohr, Vijayakrishna J. Vankayala | 2023-11-07 |
| 11689394 | Memory decision feedback equalizer | Raghukiran Sreeramaneni | 2023-06-27 |
| 11153132 | Decision feedback equalizer | Raghukiran Sreeramaneni | 2021-10-19 |
| 10783937 | Voltage reference computations for memory decision feedback equalizers | Raghukiran Sreeramaneni | 2020-09-22 |
| 10714156 | Apparatuses and method for trimming input buffers based on identified mismatches | Christian Mohr, Vijayakrishna J. Vankayala | 2020-07-14 |
| 10666470 | Decision feedback equalizer | Raghukiran Sreeramaneni | 2020-05-26 |
| 10644909 | Memory decision feedback equalizer bias level generation | Raghukiran Sreeramaneni | 2020-05-05 |
| 10637692 | Memory decision feedback equalizer | Raghukiran Sreeramaneni | 2020-04-28 |
| 10529391 | Voltage reference computations for memory decision feedback equalizers | Raghukiran Sreeramaneni | 2020-01-07 |
| 10491430 | Memory decision feedback equalizer testing | Raghukiran Sreeramaneni, Liang Liu | 2019-11-26 |
| 10482932 | Voltage reference computations for memory decision feedback equalizers | Raghukiran Sreeramaneni | 2019-11-19 |
| 10447508 | Multi-bias level generation and interpolation | Raghukiran Sreeramaneni | 2019-10-15 |
| 10419250 | Systems and methods for improved continuous time linear equalization (CTLE) | — | 2019-09-17 |
| 10373659 | Voltage reference computations for memory decision feedback equalizers | Raghukiran Sreeramaneni | 2019-08-06 |
| 10348534 | Memory decision feedback equalizer bias level generation | Raghukiran Sreeramaneni | 2019-07-09 |
| 10291439 | Decision feedback equalizer | Raghukiran Sreeramaneni | 2019-05-14 |
| 10147466 | Voltage reference computations for memory decision feedback equalizers | Raghukiran Sreeramaneni | 2018-12-04 |
| 9331646 | Input buffer apparatuses and methods | Dragos Dimitriu | 2016-05-03 |
| 9294095 | Apparatuses and methods for input buffer having combined output | — | 2016-03-22 |
| 8929163 | Input buffer apparatuses and methods | Dragos Dimitriu | 2015-01-06 |
| 8760939 | Memory sensing using temperature compensated initial currents | John D. Porter | 2014-06-24 |
| 8743640 | Methods and systems for operating memory elements | John D. Porter | 2014-06-03 |