Issued Patents All Time
Showing 101–125 of 236 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10147486 | Memory systems and memory programming methods | Emiliano Faraoni, Alessandro Calderoni, Adam Johnson | 2018-12-04 |
| 10147606 | Methods of forming semiconductor device structures including linear structures substantially aligned with other structures | Gurtej S. Sandhu | 2018-12-04 |
| 10134982 | Array of cross point memory cells | Durai Vishak Nirmal Ramaswamy, Alessandro Calderoni | 2018-11-20 |
| 10134810 | Three dimensional memory array with select device | D.V. Nirmal Ramaswamy, Gurtej S. Sandhu | 2018-11-20 |
| 10069067 | Memory arrays and methods of forming memory cells | Sanh D. Tang, John K. Zahurak | 2018-09-04 |
| 10062432 | Resistive memory sensing | D. V. Nirmal Ramaswamy, Gurtej S. Sandhu, Lei Bi, Adam Johnson, Brent Keeth +1 more | 2018-08-28 |
| 10008541 | Memory arrays and methods of forming an array of memory cell | Durai Vishak Nirmal Ramaswamy | 2018-06-26 |
| 9935264 | Memory cells and methods of fabrication | Timothy A. Quick, Eugene P. Marsh, Stefan Uhlenbrock, Chet E. Carter | 2018-04-03 |
| 9893277 | Memory arrays and methods of forming memory cells | Sanh D. Tang, John K. Zahurak | 2018-02-13 |
| 9893282 | Methods of forming resistive memory elements | Christopher W. Petz, Yongjun Jeff Hu, D. V. Nirmal Ramaswamy | 2018-02-13 |
| 9881786 | Methods of forming nanostructures using self-assembled nucleic acids, and nanostructures thereof | Gurtej S. Sandhu | 2018-01-30 |
| 9865812 | Methods of forming conductive elements of semiconductor devices and of forming memory cells | Sanh D. Tang, Whitney L. West, Rob B. Goodwin, Nishant Sinha | 2018-01-09 |
| 9853211 | Array of cross point memory cells individually comprising a select device and a programmable device | Durai Vishak Nirmal Ramaswamy | 2017-12-26 |
| 9842965 | Textured devices | Anton J. deVilliers, Erik Byers | 2017-12-12 |
| 9842839 | Memory cell, an array of memory cells individually comprising a capacitor and a transistor with the array comprising rows of access lines and columns of digit lines, a 2T-1C memory cell, and methods of forming an array of capacitors and access transistors there-above | Durai Vishak Nirmal Ramaswamy | 2017-12-12 |
| 9810418 | Solid state lights with cooling structures | — | 2017-11-07 |
| 9755144 | Memory cell structures | — | 2017-09-05 |
| 9748442 | Light emitting diodes and associated methods of manufacturing | Scott D. Schellhammer, Lifang Xu, Thomas Gehrke, Zaiyuan Ren, Anton J. De Villiers | 2017-08-29 |
| 9734906 | Multi-function resistance change memory cells and apparatuses including the same | — | 2017-08-15 |
| 9728584 | Three dimensional memory array with select device | D. V. Nirmal Ramaswamy, Gurtej S. Sandhu | 2017-08-08 |
| 9698329 | Solid-state light emitters having substrates with thermal and electrical conductivity enhancements and method of manufacture | Scott D. Schellhammer, Casey Kurth | 2017-07-04 |
| 9691976 | Interfacial cap for electrode contacts in memory cell arrays | Beth R. Cook, Nirmal Ramaswamy | 2017-06-27 |
| 9691981 | Memory cell structures | D.V. Nirmal Ramaswamy | 2017-06-27 |
| 9653315 | Methods of fabricating substrates | Gurtej S. Sandhu, Anton J. deVilliers | 2017-05-16 |
| 9614153 | Methods of selectively doping chalcogenide materials and methods of forming semiconductor devices | Jerome A. Imonigie, Prashant Raghu, Theodore M. Taylor | 2017-04-04 |