Issued Patents All Time
Showing 51–73 of 73 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6442094 | Device and method for repairing a memory array by storing each bit in multiple memory cells in the array | — | 2002-08-27 |
| 6405324 | Circuit and method for masking a dormant memory cell | — | 2002-06-11 |
| 6373761 | Method and apparatus for multiple row activation in memory devices | Patrick J. Mullarkey | 2002-04-16 |
| 6365421 | Method and apparatus for storage of test results within an integrated circuit | Brett Debenham, Kim Pierce, Douglas J. Cutter, Kurt D. Beigel, Fan Ho +6 more | 2002-04-02 |
| 6292421 | Method and apparatus for multiple row activation in memory devices | Patrick J. Mullarkey | 2001-09-18 |
| 6285618 | Device and method for repairing a memory array by storing each bit in multiple memory cells in the array | — | 2001-09-04 |
| 6195762 | Circuit and method for masking a dormant memory cell | — | 2001-02-27 |
| 6194738 | Method and apparatus for storage of test results within an integrated circuit | Brett Debenham, Kim Pierce, Douglas J. Cutter, Kurt D. Beigel, Fan Ho +6 more | 2001-02-27 |
| 6190972 | Method for storing information in a semiconductor device | Hua Zheng, Jeffrey P. Wright, Todd A. Merritt | 2001-02-20 |
| 6141276 | Apparatus and method for increasing test flexibility of a memory device | Patrick J. Mullarkey | 2000-10-31 |
| 6122213 | Device and method for repairing a memory array by storing each bit in multiple memory cells in the array | — | 2000-09-19 |
| 6115299 | Device and method for repairing a memory array by storing each bit in multiple memory cells in the array | — | 2000-09-05 |
| 6115306 | Method and apparatus for multiple row activation in memory devices | Patrick J. Mullarkey | 2000-09-05 |
| 6104650 | Sacrifice read test mode | — | 2000-08-15 |
| 6044029 | Device and method for repairing a memory array by storing each bit in multiple memory cells in the array | — | 2000-03-28 |
| 6023434 | Method and apparatus for multiple row activation in memory devices | Patrick J. Mullarkey | 2000-02-08 |
| 6023432 | Device and method for repairing a memory array by storing each bit in multiple memory cells in the array | — | 2000-02-08 |
| 5966334 | Device and method for repairing a memory array by storing each bit in multiple memory cells in the array | — | 1999-10-12 |
| 5953266 | Device and method for repairing a memory array by storing each bit in multiple memory cells in the array | — | 1999-09-14 |
| 5895962 | Structure and a method for storing information in a semiconductor device | Hua Zheng, Jeffrey P. Wright, Todd A. Merritt | 1999-04-20 |
| 5781483 | Device and method for repairing a memory array by storing each bit in multiple memory cells in the array | — | 1998-07-14 |
| 5440517 | DRAMs having on-chip row copy circuits for use in testing and video imaging and method for operating same | Donald M. Morgan | 1995-08-08 |
| 5381368 | Hardware implemented row copy enable mode for DRAMS to create repetitive backgrounds for video images or DRAM testing | Donald M. Morgan | 1995-01-10 |