| 9558799 |
Timing violation handling in a synchronous interface memory |
Christophe Vincent Antoine Laurent, Francesco Mastroianni |
2017-01-31 |
| 9208835 |
Timing violation handling in a synchronous interface memory |
Christophe Vincent Antoine Laurent, Francesco Mastroianni |
2015-12-08 |
| 8832392 |
Indexed register access for memory device |
Daniele Balluchi |
2014-09-09 |
| 8539189 |
Indexed register access for memory device |
Daniele Balluchi |
2013-09-17 |
| 7596023 |
Memory device employing three-level cells and related methods of managing |
Alessandro Magnavacca, Massimiliano Scotti, Nicola Del Gatto, Claudio Nava, Massimiliano Mollichelli |
2009-09-29 |
| 7359246 |
Memory device with a ramp-like voltage biasing structure based on a current generator |
Marco Sforzin, Nicola Del Gatto, Emanuele Confalonieri |
2008-04-15 |
| 7317637 |
Programming method of multilevel memories and corresponding circuit |
Emanuele Confalonieri, Nicola Del Gatto, Carlo Lisi |
2008-01-08 |
| 6956787 |
Method and device for timing random reading of a memory device |
Carlo Lisi, Massimiliano Scotti, Emanuele Confalonieri |
2005-10-18 |
