Issued Patents All Time
Showing 551–575 of 1,109 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7133315 | Write once read only memory employing charge trapping in insulators | — | 2006-11-07 |
| 7132711 | Programmable array logic or memory with p-channel devices and asymmetrical tunnel barriers | Jerome M. Eldridge, Kie Y. Ahn | 2006-11-07 |
| 7130220 | Write once read only memory employing floating gates | — | 2006-10-31 |
| 7129553 | Lanthanide oxide/hafnium oxide dielectrics | Kie Y. Ahn | 2006-10-31 |
| 7126380 | Distributed clock generator for semiconductor devices and related methods of operating semiconductor devices | — | 2006-10-24 |
| 7126183 | Programmable array logic or memory with p-channel devices and asymmetrical tunnel barriers | Jerome M. Eldridge, Kie Y. Ahn | 2006-10-24 |
| 7120046 | Memory array with surrounding gate access transistors and capacitors with global and staggered local bit lines | — | 2006-10-10 |
| 7115939 | Floating gate transistor with horizontal gate layers stacked next to vertical body | — | 2006-10-03 |
| 7115493 | Antifuse structures, methods, and applications | Jerome M. Eldridge | 2006-10-03 |
| 7115480 | Micromechanical strained semiconductor by wafer bonding | — | 2006-10-03 |
| 7112543 | Methods of forming assemblies comprising silicon-doped aluminum oxide | Ki Y. Ahn | 2006-09-26 |
| 7112494 | Write once read only memory employing charge trapping in insulators | — | 2006-09-26 |
| 7112841 | Graded composition metal oxide tunnel barrier interpoly insulators | Jerome M. Eldridge, Kie Y. Ahn | 2006-09-26 |
| 7113429 | Nor flash memory cell with high storage density | — | 2006-09-26 |
| 7110299 | Transistor with nanocrystalline silicon gate structure | — | 2006-09-19 |
| 7109563 | Films deposited at glancing incidence for multilevel metallization | Kie Y. Ahn | 2006-09-19 |
| 7109548 | Operating a memory device | Joseph E. Geusic | 2006-09-19 |
| 7105461 | Composite dielectric forming methods and composite dielectrics | Kie Y. Ahn | 2006-09-12 |
| 7105386 | High density SRAM cell with latched vertical transistors | Wendell P. Noble | 2006-09-12 |
| 7102450 | Method and apparatus for providing clock signals at different locations with minimal clock skew | — | 2006-09-05 |
| 7101770 | Capacitive techniques to reduce noise in high speed interconnections | — | 2006-09-05 |
| 7101778 | Transmission lines for CMOS integrated circuits | Eugene H. Cloud, Kie Y. Ahn | 2006-09-05 |
| 7101813 | Atomic layer deposited Zr-Sn-Ti-O films | Kie Y. Ahn | 2006-09-05 |
| 7102191 | Memory device with high dielectric constant gate dielectrics and metal floating gates | — | 2006-09-05 |
| 7095075 | Apparatus and method for split transistor memory having improved endurance | — | 2006-08-22 |