Issued Patents All Time
Showing 26–50 of 104 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7805586 | System and method for optimizing interconnections of memory devices in a multichip module | — | 2010-09-28 |
| 7721135 | Method of timing calibration using slower data rate pattern | Terry R. Lee, Joseph M. Jeddeloh | 2010-05-18 |
| 7681006 | Asynchronously-accessible memory device with mode selection circuitry for burst or pipelined operation | Jeffrey S. Mailloux, Todd A. Merritt, Brett Williams | 2010-03-16 |
| 7681005 | Asynchronously-accessible memory device with mode selection circuitry for burst or pipelined operation | Jeffrey S. Mailloux, Todd A. Merritt, Brett Williams | 2010-03-16 |
| 7619459 | High speed voltage translator circuit | — | 2009-11-17 |
| 7613026 | Apparatus and methods for optically-coupled memory systems | Terry R. Lee | 2009-11-03 |
| 7583108 | Current comparator using wide swing current mirrors | — | 2009-09-01 |
| 7379315 | Apparatus and methods for optically-coupled memory systems | Terry R. Lee | 2008-05-27 |
| 7376857 | Method of timing calibration using slower data rate pattern | Terry R. Lee, Joseph M. Jeddeloh | 2008-05-20 |
| 7352603 | Apparatus and methods for optically-coupled memory systems | Terry R. Lee | 2008-04-01 |
| 7350018 | Method and system for using dynamic random access memory as cache memory | Brent Keeth, Brian M. Shirley, Charles H. Dennison | 2008-03-25 |
| 7313644 | Memory device interface | — | 2007-12-25 |
| 7280382 | Apparatus and methods for optically-coupled memory systems | Terry R. Lee | 2007-10-09 |
| 7280381 | Apparatus and methods for optically-coupled memory systems | Terry R. Lee | 2007-10-09 |
| 7124256 | Memory device for burst or pipelined operation with mode selection circuitry | Jeffrey S. Mailloux, Todd A. Merritt, Brett Williams | 2006-10-17 |
| 7120754 | Synchronous DRAM with selectable internal prefetch size | Christopher Johnson | 2006-10-10 |
| 7117299 | DRAM with hidden refresh | — | 2006-10-03 |
| 7103742 | Burst/pipelined edo memory device | Jeffrey S. Mailloux, Todd A. Merritt, Brett Williams | 2006-09-05 |
| 7035962 | Pipelined packet-oriented memory system having a unidirectional command and address bus and a bidirectional data bus | — | 2006-04-25 |
| 7027349 | Method for selecting memory device in response to bank selection signal | Brent Keeth | 2006-04-11 |
| 6981100 | Synchronous DRAM with selectable internal prefetch size | Christopher Johnson | 2005-12-27 |
| 6977655 | Dual mode DDR SDRAM/SGRAM | — | 2005-12-20 |
| 6963949 | Pipelined packet-oriented memory system having a unidirectional command and address bus and a bidirectional data bus | — | 2005-11-08 |
| 6961259 | Apparatus and methods for optically-coupled memory systems | Terry R. Lee | 2005-11-01 |
| 6948027 | Method and system for using dynamic random access memory as cache memory | Brent Keeth, Brian M. Shirley, Charles H. Dennison | 2005-09-20 |