Issued Patents All Time
Showing 76–100 of 497 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11031377 | Integration of three-dimensional NAND memory devices with multiple functional chips | — | 2021-06-08 |
| 11024600 | Unified semiconductor devices having programmable logic device and heterogeneous memories and methods for forming the same | Weihua Cheng | 2021-06-01 |
| 10991759 | Methods of forming vertical field-effect transistor with selfaligned contacts for memory devices with planar periphery/array and intermediate structures formed thereby | Sanh D. Tang, David H. Wells | 2021-04-27 |
| 10984862 | Three-dimensional memory device with embedded dynamic random-access memory | — | 2021-04-20 |
| 10971683 | Methods for forming narrow vertical pillars and integrated circuit devices having the same | Kunal R. Parekh | 2021-04-06 |
| 10971517 | Source contact structure of three-dimensional memory devices and fabrication methods thereof | Yi Liu, Lu Fan | 2021-04-06 |
| 10963613 | Partial reconfiguration of integrated circuits using shell representation of platform design with extended routing region | Meiwei Wu, Raymond Kong | 2021-03-30 |
| 10937766 | Three-dimensional memory device with three-dimensional phase-change memory | — | 2021-03-02 |
| 10893005 | Partial reconfiguration for Network-on-Chip (NoC) | David P. Schultz, Ian A. Swarbrick, Raymond Kong, Herve Alexanian | 2021-01-12 |
| 10892276 | Three-dimensional memory devices and fabrication methods thereof | Li Xiao, Yu Ting Zhou | 2021-01-12 |
| 10892275 | Stacked connections in 3D memory and methods of making the same | Zongliang Huo | 2021-01-12 |
| 10886294 | Three-dimensional memory devices and fabrication methods thereof | Li Xiao | 2021-01-05 |
| 10878911 | Memory device using comb-like routing structure for reduced metal line loading | Zongliang Huo, Zhiliang Xia, Li Xiao | 2020-12-29 |
| 10879459 | Phase change memory cell with constriction structure | Michael P. Violette | 2020-12-29 |
| 10879263 | Three-dimensional memory devices with architecture of increased number of bit lines | Lei Xue | 2020-12-29 |
| 10868031 | Multiple-stack three-dimensional memory device and fabrication method thereof | Zongliang Huo, Li Xiao, Zhenyu Lu, Qian Tao, Yushi Hu +4 more | 2020-12-15 |
| 10847722 | Buried low-resistance metal word lines for cross-point variable-resistance material memories | Michael P. Violette | 2020-11-24 |
| 10824786 | Extend routing range for partial reconfiguration | Hao Yu, Raymond Kong, David P. Schultz | 2020-11-03 |
| D900369 | Flashlight | Wei Xiong | 2020-10-27 |
| 10797028 | Three-dimensional memory devices with stacked device chips using interposers | Li Xiao | 2020-10-06 |
| 10797237 | Resistive memory architectures with multiple memory cells per access device | Michael P. Violette | 2020-10-06 |
| 10790020 | Memory cells, memory cell programming methods, memory cell reading methods, memory cell operating methods, and memory devices | — | 2020-09-29 |
| 10784225 | Bonded semiconductor structures having bonding contacts made of indiffusible conductive materials and methods for forming the same | Zongliang Huo, Jifeng Zhu, Jun Chen, Zi Qun Hua, Li Xiao | 2020-09-22 |
| 10777739 | Phase change memory cell with constriction structure | Michael P. Violette | 2020-09-15 |
| 10770141 | Semiconductor memory devices including a memory array and related method incorporating different biasing schemes | David H. Wells | 2020-09-08 |