Issued Patents All Time
Showing 76–100 of 147 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11755214 | Sequential data optimized sub-regions in storage devices | David Aaron Palmer, Sean L. Manion, Stephen Hanna, Qing Liang, Nadav Grosz +2 more | 2023-09-12 |
| 11755490 | Unmap operation techniques | Giuseppe Cariello, Luca Porzio, Roberto Izzi | 2023-09-12 |
| 11755237 | Overwriting at a memory system | Giuseppe Cariello, Reshmi Basu | 2023-09-12 |
| 11740963 | Methods and system with dynamic ECC voltage and frequency | Nadav Grosz, David Aaron Palmer, Christian M. Gyllenskog | 2023-08-29 |
| 11742028 | Non-volatile memory devices and systems with volatile memory features and methods for operating the same | Timothy B. Cowles, George B. Raad, James S. Rehmeyer | 2023-08-29 |
| 11720281 | Status information retrieval for a memory device | Kulachet Tanpairoj | 2023-08-08 |
| 11720261 | Transferring memory system data to a host system | Qing Liang, Nadav Grosz, Deping He | 2023-08-08 |
| 11714563 | Volatile register to detect power loss | Deping He | 2023-08-01 |
| 11704252 | Dual address encoding for logical-to-physical mapping | Giuseppe Cariello | 2023-07-18 |
| 11687477 | Signaling mechanism for bus inversion | Stephen Hanna | 2023-06-27 |
| 11656940 | Techniques for managing temporarily retired blocks of a memory system | Deping He, Chun Sum Yeung | 2023-05-23 |
| 11656673 | Managing reduced power memory operations | Qing Liang, David Aaron Palmer, Stephen Hanna | 2023-05-23 |
| 11605434 | Overwriting at a memory system | Jeffrey S. McNeil, Giuseppe Cariello, Kishore Kumar Muchherla, Reshmi Basu | 2023-03-14 |
| 11599485 | Status check using signaling | Reshmi Basu | 2023-03-07 |
| 11556481 | Increased efficiency obfuscated logical-to-physical map management | Nadav Grosz | 2023-01-17 |
| 11520497 | Peak power management in a memory device | Liang Yu, Luigi Pilolli | 2022-12-06 |
| 11513835 | Notifying memory system of host events via modulated reset signals | Qing Liang, Kulachet Tanpairoj, Stephen Hanna | 2022-11-29 |
| 11507518 | Logical-to-physical mapping using a flag to indicate whether a mapping entry points to [[for]] sequentially stored data | Giuseppe Cariello | 2022-11-22 |
| 11495299 | Non-volatile memory devices and systems with volatile memory features and methods for operating the same | Timothy B. Cowles, George B. Raad, James S. Rehmeyer | 2022-11-08 |
| 11481336 | Host assisted operations in managed memory devices | Nadav Grosz | 2022-10-25 |
| 11461042 | Non-volatile memory module architecture to support memory error correction | George E. Pax | 2022-10-04 |
| 11454941 | Peak power management of dice in a power network | David Aaron Palmer | 2022-09-27 |
| 11435944 | Dynamic memory address write policy translation based on performance needs | Giuseppe Cariello | 2022-09-06 |
| 11416393 | Efficient scrambling and encoding for copyback procedures using precomputed values | Robert B. Eisenhuth | 2022-08-16 |
| 11404129 | Power architecture for non-volatile memory | Qisong Lin, Shuai Xu, Jeremy Binfet, Michele Piccardi, Qing Liang | 2022-08-02 |