HC

Hiang C. Chan

Micron: 28 patents #656 of 6,345Top 15%
📍 Boise, ID: #366 of 3,546 inventorsTop 15%
🗺 Idaho: #511 of 8,810 inventorsTop 6%
Overall (All Time): #140,236 of 4,157,543Top 4%
28
Patents All Time

Issued Patents All Time

Showing 1–25 of 28 patents

Patent #TitleCo-InventorsDate
6197662 Semiconductor processing method of forming field isolation oxide using a polybuffered mask which includes a base nitride layer on the substrate, and other semiconductor processing methods 2001-03-06
6107176 Method of fabricating a gate having a barrier of titanium silicide Pierre C. Fazan 2000-08-22
6087700 Gate having a barrier of titanium silicide Pierre C. Fazan 2000-07-11
5966621 Semiconductor processing method of forming field isolation oxide relative to a semiconductor substrate 1999-10-12
5798296 Method of fabricating a gate having a barrier of titanium silicide Pierre C. Fazan 1998-08-25
5358894 Oxidation enhancement in narrow masked field regions of a semiconductor wafer Pierre C. Fazan, Viju K. Mathews, Gurtej S. Sandhu, Mohammed Anjum 1994-10-25
5313087 Semiconductor device for minimizing diffusion of conductivity enhancing impurities from one region of a polysilicon layer to another Pierre C. Fazan, Bohr-Winn Shih 1994-05-17
5281549 Process for fabricating a stacked capacitor having an I-shaped cross-section in a dynamic random access memory array Pierre C. Fazan 1994-01-25
5273924 Method for forming an SRAM by minimizing diffusion of conductivity enhancing impurities from one region of a polysilicon layer to another region Pierre C. Fazan, Bohr-Winn Shih 1993-12-28
5262343 DRAM stacked capacitor fabrication process Howard E. Rhodes, Pierre C. Fazan, Charles H. Dennison, Yauh-Ching Liu 1993-11-16
5236860 Lateral extension stacked capacitor Pierre C. Fazan, Gurtej S. Sandhu, Yauh-Ching Liu 1993-08-17
5236856 Method for minimizing diffusion of conductivity enhancing impurities from one region of polysilicon layer to another region and a semiconductor device produced according to the method Pierre C. Fazan, Bohr-Winn Shih 1993-08-17
5234855 Stacked comb spacer capacitor Howard E. Rhodes, Charles H. Dennison, Yauh-Ching Liu, Pierre C. Fazan, Gurtej S. Sandhu 1993-08-10
5170233 Method for increasing capacitive surface area of a conductive material in semiconductor processing and stacked memory cell capacitor Yauh-Ching Liu, Pierre C. Fazan, Charles H. Dennison, Howard E. Rhodes 1992-12-08
5137842 Stacked H-cell capacitor and process to fabricate same Pierre C. Fazan 1992-08-11
5126280 Stacked multi-poly spacers with double cell plate capacitor Pierre C. Fazan 1992-06-30
5122476 Double DRAM cell Pierre C. Fazan, Yauh-Ching Liu, Gurtej S. Sandhu, Howard E. Rhodes 1992-06-16
5108943 Mushroom double stacked capacitor Gurtej S. Sandhu, Pierre C. Fazan, Yauh-Ching Liu 1992-04-28
5089986 Mushroom double stacked capacitor Gurtej S. Sandhu, Pierre C. Fazan, Yauh-Ching Liu 1992-02-18
5087586 Process for creating fully-recessed field isolation regions by oxidizing a selectively-grown epitaxial silicon layer Pierre C. Fazan 1992-02-11
5084405 Process to fabricate a double ring stacked cell structure Pierre C. Fazan, Chuck Dennison, Howard E. Rhodes, Yauh-Ching Liu 1992-01-28
5084406 Method for forming low resistance DRAM digit-line Howard E. Rhodes, Pierre C. Fazan, Charles H. Dennison, Yauh-Ching Liu 1992-01-28
5082797 Method of making stacked textured container capacitor Pierre C. Fazan, Yauh-Ching Liu 1992-01-21
5081559 Enclosed ferroelectric stacked capacitor Pierre C. Fazan, Yauh-Ching Liu 1992-01-14
5061650 Method for formation of a stacked capacitor Charles H. Dennison, Yauh-Ching Liu, Pierre C. Fazan, Howard E. Rhodes 1991-10-29