GB

Guy T. Blalock

Micron: 189 patents #49 of 6,345Top 1%
📍 Boise, ID: #20 of 3,546 inventorsTop 1%
🗺 Idaho: #31 of 8,810 inventorsTop 1%
Overall (All Time): #3,824 of 4,157,543Top 1%
189
Patents All Time

Issued Patents All Time

Showing 176–189 of 189 patents

Patent #TitleCo-InventorsDate
5416048 Method to slope conductor profile prior to dielectric deposition to improve dielectric step-coverage Trung T. Doan 1995-05-16
5378648 Situ stringer removal during polysilicon capacitor cell plate delineation Audrey P. Lin 1995-01-03
5346585 Use of a faceted etch process to eliminate stringers Trung T. Doan 1994-09-13
5328557 Plasma treatment of O-rings 1994-07-12
5320981 High accuracy via formation for semiconductor devices 1994-06-14
5300801 Stacked capacitor construction Phillip G. Wald 1994-04-05
5286344 Process for selectively etching a layer of silicon dioxide on an underlying stop layer of silicon nitride David S. Becker, Fred L. Roe 1994-02-15
5259924 Integrated circuit fabrication process to reduce critical dimension loss during etching Viju K. Mathews, Ardavan Niroomand, Pierre C. Fazan 1993-11-09
5256245 Use of a clean up step to form more vertical profiles of polycrystalline silicon sidewalls during the manufacture of a semiconductor device David J. Keller 1993-10-26
5252517 Method of conductor isolation from a conductive contact plug David S. Becker 1993-10-12
5238862 Method of forming a stacked capacitor with striated electrode Phillip G. Wald 1993-08-24
5229326 Method for making electrical contact with an active area through sub-micron contact openings and a semiconductor device Charles H. Dennison 1993-07-20
5223730 Stacked-trench dram cell that eliminates the problem of phosphorus diffusion into access transistor channel regions Howard E. Rhodes 1993-06-29
5213659 Combination usage of noble gases for dry etching semiconductor wafers Scott Alan Ludwig 1993-05-25