Issued Patents All Time
Showing 26–35 of 35 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11269545 | NAND logical-to-physical table region tracking | Eric Kwok Fung Yuen, Giuseppe Ferrari, Massimo Iaculo, Lalla Fatima Drissi, Xinghui Duan | 2022-03-08 |
| 11169917 | Controlling NAND operation latency | Luigi Esposito, Xinghui Duan, Lucia Santojanni, Massimo Iaculo | 2021-11-09 |
| 11151052 | Reading sequential data from memory using a pivot table | Carminantonio Manganelli, Paolo Papa, Yoav Weinberg, Giuseppe Ferrari, Massimo Laculo +1 more | 2021-10-19 |
| 11132044 | Dynamic P2L asynchronous power loss mitigation | Xiangang Luo, Ting Luo, Jianmin Huang | 2021-09-28 |
| 11023167 | Methods and apparatuses for executing a plurality of queued tasks in a memory | Graziano Mirichigni, Danilo Caraccio, Luca Porzio, Antonino Pollio | 2021-06-01 |
| 10983918 | Hybrid logical to physical caching scheme | Carminantonio Manganelli, Yoav Weinberg, Alberto Sassara, Paolo Papa, Luigi Esposito +2 more | 2021-04-20 |
| 10725904 | Synchronizing NAND logical-to-physical table region tracking | Zhao Cui, Eric Kwok Fung Yuen, Guan Wang, Xinghui Duan, Giuseppe Ferrari | 2020-07-28 |
| 10552316 | Controlling NAND operation latency | Luigi Esposito, Xinghui Duan, Lucia Santojanni, Massimo Iaculo | 2020-02-04 |
| 10108372 | Methods and apparatuses for executing a plurality of queued tasks in a memory | Graziano Mirichigni, Danilo Caraccio, Luca Porzio, Antonino Pollio | 2018-10-23 |
| 9183135 | Preparation of memory device for access using memory access type indicator signal | Massimo Iaculo, Ornella Vitale, Danilo Caraccio, Francesco Falanga, Emanuele Confalonieri | 2015-11-10 |