Issued Patents All Time
Showing 251–275 of 522 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7274600 | NAND flash memory with read and verification threshold uniformity | — | 2007-09-25 |
| 7274596 | Reduction of adjacent floating gate data pattern sensitivity | — | 2007-09-25 |
| 7274086 | Memory device power distribution in memory assemblies | — | 2007-09-25 |
| 7272758 | Defective memory block identification in a memory device | — | 2007-09-18 |
| 7272709 | Using chip select to specify boot memory | Cliff Zitlaw, David Eggleston | 2007-09-18 |
| 7269686 | Synchronous memory open page register | — | 2007-09-11 |
| 7257667 | Status register to improve initialization of a synchronous memory | — | 2007-08-14 |
| 7251711 | Apparatus and methods having a command sequence | — | 2007-07-31 |
| 7236407 | Flash memory architecture for optimizing performance of memory having multi-level memory cells | Kevin C. Zitlaw, Cliff Zitlaw | 2007-06-26 |
| 7230850 | User configurable commands for flash memory | — | 2007-06-12 |
| 7227777 | Mode selection in a flash memory device | — | 2007-06-05 |
| 7221603 | Defective block handling in a flash memory device | — | 2007-05-22 |
| 7221593 | Non-volatile memory device with erase address register | — | 2007-05-22 |
| 7218551 | Multiple level cell memory device with single bit per cell, re-mappable memory block | — | 2007-05-15 |
| 7203874 | Error detection, documentation, and correction in a flash memory device | — | 2007-04-10 |
| 7196958 | Power efficient memory and cards | — | 2007-03-27 |
| 7197607 | Non-volatile memory with concurrent write and read operation to differing banks | — | 2007-03-27 |
| 7193266 | Strapping word lines of NAND memory devices | — | 2007-03-20 |
| 7193910 | Adjustable timing circuit of an integrated circuit | Dean Nobunaga | 2007-03-20 |
| 7180791 | Flash with consistent latency for read operations | — | 2007-02-20 |
| 7180781 | Memory block erasing in a flash memory device | Ebrahim Abedifard | 2007-02-20 |
| 7181566 | Scratch control memory array in a flash memory device | — | 2007-02-20 |
| 7177976 | Top/bottom symmetrical protection scheme for flash | Kevin C. Widmer | 2007-02-13 |
| 7168013 | Memory with element redundancy | — | 2007-01-23 |
| 7161870 | Synchronous flash memory command sequence | Cliff Zitlaw | 2007-01-09 |