Issued Patents All Time
Showing 1–25 of 25 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11513740 | Apparatus, system, and method of byte addressable and block addressable storage and retrieval of data to and from non-volatile storage memory | Mike Hossein Amidi | 2022-11-29 |
| 10901661 | Apparatus, system, and method of byte addressable and block addressable storage and retrieval of data to and from non-volatile storage memory | Mike Hossein Amidi | 2021-01-26 |
| 10235103 | Apparatus, system, and method of byte addressable and block addressable storage and retrival of data to and from non-volatile storage memory | Mike Hossein Amidi | 2019-03-19 |
| 10008872 | Methods of extending the life of battery | Farzan Roohparvar | 2018-06-26 |
| 9461339 | Structure and method for extending battery life | — | 2016-10-04 |
| 9019774 | Method and system for minimizing number of programming pulses used to program rows of non-volatile memory cells | — | 2015-04-28 |
| 8432765 | Method and apparatus for managing behavior of memory devices | — | 2013-04-30 |
| 8248881 | Method and apparatus for managing behavior of memory devices | — | 2012-08-21 |
| 7719917 | Method and apparatus for managing behavior of memory devices | — | 2010-05-18 |
| 7512029 | Method and apparatus for managing behavior of memory devices | — | 2009-03-31 |
| 6903970 | Flash memory device with distributed coupling between array ground and substrate | Ebrahim Abedifard | 2005-06-07 |
| 6717853 | Flash memory device with distributed coupling between array ground and substrate | Ebrahim Abedifard | 2004-04-06 |
| 6094377 | Memory circuit with switch for selectively connecting an input/output pad directly to a nonvolatile memory cell | Michael S. Briner | 2000-07-25 |
| 6016561 | Output data compression scheme for use in testing IC memories | Allahyar Vahidi Mowlavi, Mark Hawes, Gregory L. Cowan | 2000-01-18 |
| 5955913 | Integrated circuit operable in a mode having extremely low power consumption | — | 1999-09-21 |
| 5896400 | Memory circuit with switch for selectively connecting an input/output pad directly to a nonvolatile memory cell | Michael S. Briner | 1999-04-20 |
| 5801585 | Integrated circuit operable in a mode having extremely low power consumption | — | 1998-09-01 |
| 5787097 | Output data compression scheme for use in testing IC memories | Allahyar Vahidi Mowlavi, Mark Hawes, Gregory L. Cowan | 1998-07-28 |
| 5706235 | Memory circuit with switch for selectively connecting an I/O pad directly to a nonvolatile memory cell and method for operating same | Michael S. Briner | 1998-01-06 |
| 5680352 | Circuit for generating a delayed standby signal in response to an external standby command | — | 1997-10-21 |
| 5677879 | Method and apparatus for performing memory cell verification on a nonvolatile memory circuit | Michael S. Briner | 1997-10-14 |
| 5670906 | Integrated circuit operable in a mode having extremely low power consumption | — | 1997-09-23 |
| 5594694 | Memory circuit with switch for selectively connecting an input/output pad directly to a nonvolatile memory cell | Michael S. Briner | 1997-01-14 |
| 5568426 | Method and apparatus for performing memory cell verification on a nonvolatile memory circuit | Michael S. Briner | 1996-10-22 |
| 5524096 | Circuit for generating a delayed standby signal in response to an external standby command | — | 1996-06-04 |