Issued Patents All Time
Showing 101–125 of 150 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10157647 | Apparatuses and methods for storing and writing multiple parameter codes for memory operating parameters | Daniel C. Skinner | 2018-12-18 |
| 10115449 | Frequency synthesis for memory input-output operations | Moo Sung Chae, Daniel C. Skinner | 2018-10-30 |
| 10090836 | Methods and systems for averaging impedance calibration | — | 2018-10-02 |
| 9978437 | Apparatuses and methods for dynamic voltage and frequency switching for dynamic random access memory | — | 2018-05-22 |
| 9965408 | Apparatuses and methods for asymmetric input/output interface for a memory | Bruce W. Schober, Moo Sung Chae | 2018-05-08 |
| 9934831 | Apparatuses and methods for storing and writing multiple parameter codes for memory operating parameters | Daniel C. Skinner | 2018-04-03 |
| 9935632 | Methods and systems for averaging impedance calibration | — | 2018-04-03 |
| 9911469 | Apparatuses and methods for power efficient driver circuits | Timothy M. Hollis, Larren G. Weber | 2018-03-06 |
| 9766831 | Apparatuses and methods for arbitrating a shared terminal for calibration of an impedance termination | — | 2017-09-19 |
| 9601182 | Frequency synthesis for memory input-output operations | Moo Sung Chae, Daniel C. Skinner | 2017-03-21 |
| 9508409 | Apparatuses and methods for implementing masked write commands | Mark Kalei Hadrick, Jeffrey P. Wright, Victor Wong, Simon J. Lovett, Donald M. Morgan +3 more | 2016-11-29 |
| 8599629 | Method and apparatus for synchronizing data from memory arrays | Simon J. Lovett | 2013-12-03 |
| 8248870 | Method and apparatus for synchronizing data from memory arrays | Simon J. Lovett | 2012-08-21 |
| 7660172 | Method and apparatus for synchronizing data from memory arrays | Simon J. Lovett | 2010-02-09 |
| 7489165 | Method and apparatus for amplifying a regulated differential signal to a higher voltage | — | 2009-02-10 |
| 7362627 | Method and apparatus for synchronizing data from memory arrays | Simon J. Lovett | 2008-04-22 |
| 7285986 | High speed, low power CMOS logic gate | Simon J. Lovett, Larren G. Weber | 2007-10-23 |
| 7274220 | Method and apparatus for amplifying a regulated differential signal to a higher voltage | — | 2007-09-25 |
| 7215585 | Method and apparatus for synchronizing data from memory arrays | Simon J. Lovett | 2007-05-08 |
| 7050342 | Testmode to increase acceleration in burn-in | John R. Wilford | 2006-05-23 |
| 7046038 | Upward and downward pulse stretcher circuits and modules | John D. Porter, Larren G. Weber | 2006-05-16 |
| 6982572 | Digital logic devices with extremely skewed trip points and reset circuitry for rapidly propagating signal edges, circuits and systems including same | John D. Porter, Larren G. Weber | 2006-01-03 |
| 6972589 | Method for rapidly propagating a fast edge of an output signal through a skewed logic device | John D. Porter, Larren G. Weber | 2005-12-06 |
| 6965255 | Method and apparatus for amplifying a regulated differential signal to a higher voltage | — | 2005-11-15 |
| 6949948 | Digital logic devices with extremely skewed trip points and reset circuitry for rapidly propagating signal edges | John D. Porter, Larren G. Weber | 2005-09-27 |