Issued Patents All Time
Showing 26–50 of 97 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11804271 | Operational modes for reduced power consumption in a memory system | Marco Sforzin, Umberto Di Vincenzo | 2023-10-31 |
| 11797717 | Bus encryption for non-volatile memories | Paolo Amato, Marco Sforzin, Danilo Caraccio, Niccolò Izzo | 2023-10-24 |
| 11782854 | Cache architecture for a storage device | Dionisio Minopoli | 2023-10-10 |
| 11775382 | Modified parity data using a poison data unit | Marco Sforzin, Paolo Amato | 2023-10-03 |
| 11742002 | Memory activation timing management | Angelo Visconti, Giorgio Servalli | 2023-08-29 |
| 11720163 | Providing energy information to memory | Greg A. Blodgett, Danilo Caraccio, Graziano Mirichigni | 2023-08-08 |
| 11721395 | Timing parameter adjustment mechanisms | Marco Sforzin | 2023-08-08 |
| 11693781 | Caching or evicting host-resident translation layer based on counter | Dionisio Minopoli | 2023-07-04 |
| 11687273 | Memory controller for managing data and error information | Emanuele Confalonieri, Paolo Amato, Marco Sforzin, Danilo Caraccio | 2023-06-27 |
| 11669461 | Logical to physical table fragments | Dionisio Minopoli | 2023-06-06 |
| 11656983 | Host-resident translation layer write command | Dionisio Minopoli | 2023-05-23 |
| 11579970 | Maintenance command interfaces for a memory system | Danilo Caraccio | 2023-02-14 |
| 11550678 | Memory management | Marco Dallabora, Emanuele Confalonieri, Paolo Amato, Danilo Caraccio | 2023-01-10 |
| 11494122 | Command queuing | Victor Y. Tsai, Danilo Caraccio, Neal A. Galbo, Robert Warren | 2022-11-08 |
| 11488681 | Data state synchronization | Paolo Amato, Marco Dallabora, Danilo Caraccio, Emanuele Confalonieri | 2022-11-01 |
| 11456033 | Dedicated commands for memory operations | Paolo Amato, Graziano Mirichigni, Danilo Caraccio, Marco Sforzin, Marco Dallabora | 2022-09-27 |
| 11397461 | Providing energy information to memory | Greg A. Blodgett, Danilo Caraccio, Graziano Mirichigni | 2022-07-26 |
| 11392515 | Cache architecture for a storage device | Dionisio Minopoli | 2022-07-19 |
| 11340808 | Latency-based storage in a hybrid memory system | Danilo Caraccio, Emanuele Confalonieri, Marco Dallabora, Roberto Izzi, Paolo Amato +1 more | 2022-05-24 |
| 11335416 | Operational modes for reduced power consumption in a memory system | Marco Sforzin, Umberto Di Vincenzo | 2022-05-17 |
| 11327892 | Latency-based storage in a hybrid memory system | Danilo Caraccio, Emanuele Confalonieri, Marco Dallabora, Roberto Izzi, Paolo Amato +1 more | 2022-05-10 |
| 11209986 | Memory operations on data | Paolo Amato, Danilo Caraccio, Emanuele Confalonieri, Marco Dallabora | 2021-12-28 |
| 11194708 | Data relocation in memory having two portions of data | Paolo Amato | 2021-12-07 |
| 11183248 | Timing parameter adjustment mechanisms | Marco Sforzin | 2021-11-23 |
| 11132311 | Interface for memory having a cache and multiple independent arrays | Dionisio Minopoli, Gianfranco Ferrante, Antonino Caprì, Emanuele Confalonieri | 2021-09-28 |