Issued Patents All Time
Showing 126–149 of 149 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7551510 | Memory block reallocation in a flash memory device | Jin-Man Han | 2009-06-23 |
| 7546416 | Method for substantially uninterrupted cache readout | — | 2009-06-09 |
| 7532524 | Bitline exclusion in verification operation | Hendrik Hartono, Benjamin Louie | 2009-05-12 |
| 7505323 | Programming memory devices | Dzung H. Nguyen, Benjamin Louie, Hagop Nazarian, Jin-Man Han | 2009-03-17 |
| 7486530 | Method of comparison between cache and data register for non-volatile memory | Hendrik Hartono, Benjamin Louie, Hagop Nazarian | 2009-02-03 |
| 7447847 | Memory device trims | Benjamin Louie, Jin-Man Han | 2008-11-04 |
| 7400549 | Memory block reallocation in a flash memory device | Jin-Man Han | 2008-07-15 |
| 7379365 | Method and apparatus for charging large capacitances | — | 2008-05-27 |
| 7369447 | Random cache read | Benjamin Louie, Yunqiu Wan, Jin-Man Han | 2008-05-06 |
| 7345918 | Selective threshold voltage verification and compaction | — | 2008-03-18 |
| 7345924 | Programming memory devices | Dzung H. Nguyen, Benjamin Louie, Hagop Nazarian, Jin-Man Han | 2008-03-18 |
| 7336536 | Handling defective memory blocks of NAND memory devices | Benjamin Louie | 2008-02-26 |
| 7336537 | Handling defective memory blocks of NAND memory devices | Benjamin Louie | 2008-02-26 |
| 7274607 | Bitline exclusion in verification operation | Hendrik Hartono, Benjamin Louie | 2007-09-25 |
| 7269066 | Programming memory devices | Dzung H. Nguyen, Benjamin Louie, Hagop Nazarian, Jin-Man Han | 2007-09-11 |
| 7254049 | Method of comparison between cache and data register for non-volatile memory | Hendrik Hartono, Benjamin Louie, Hagop Nazarian | 2007-08-07 |
| 7209387 | Non-volatile programmable fuse apparatus in a flash memory with pairs of supercells programmed in a complementary fashion | — | 2007-04-24 |
| 7123521 | Random cache read | Benjamin Louie, Yunqiu Wan, Jin-Man Han | 2006-10-17 |
| 6879519 | Non-volatile programmable fuse apparatus in a memory device | — | 2005-04-12 |
| 5999425 | Charge pump architecture for integrated circuit | Timothy M. Lacey | 1999-12-07 |
| 5920506 | Method and apparatus for bulk preprogramming flash memory cells with minimal source and drain currents | Hsingya Arthur Wang, Haike Dong, Jein-Chen Young, Yuan Tang, Kenneth Miu | 1999-07-06 |
| 5892670 | Charge pump architecture | Timothy M. Lacey | 1999-04-06 |
| 5801934 | Charge pump with reduced power consumption | Timothy M. Lacey | 1998-09-01 |
| 5656949 | Architecture for FPGAs | Timothy M. Lacey, Anup Nayak, Rajiv Nema, Han-Kim Nguyen | 1997-08-12 |