Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10521544 | Traffic shaping in networking system-on-chip verification | Deepak Garg, Sudhanshu Jayaswal, Saurabh Khaitan, Sanjay Gupta, John R. Stickley +2 more | 2019-12-31 |
| 10503848 | Target capture and replay in emulation | Satish Kumar Agarwal, Sanjay Gupta, Charles W. Selvidge | 2019-12-10 |
| 10410713 | Content addressable memory modeling in emulation and prototyping | Charles W. Selvidge, Sanjay Gupta, Praveen Shukla, Saurabh Gupta | 2019-09-10 |
| 9990452 | Low power corruption of memory in emulation | Mukesh Gupta, Praveen Shukla, Sanjay Gupta | 2018-06-05 |
| 9946823 | Dynamic control of design clock generation in emulation | Satish Kumar Agarwal, Amit Jain, Sanjay Gupta | 2018-04-17 |
| 9898563 | Modeling memory in emulation based on cache | Mukesh Gupta, Sanjay Gupta, Charles W. Selvidge | 2018-02-20 |
| 9767237 | Target capture and replay in emulation | Satish Kumar Agarwal, Sanjay Gupta, Charles W. Selvidge | 2017-09-19 |
| 9703579 | Debug environment for a multi user hardware assisted verification system | Charles W. Selvidge, Sanjay Gupta, Amit Jain | 2017-07-11 |
| 9619600 | Third party component debugging for integrated circuit design | Charles W. Selvidge, Sanjay Gupta | 2017-04-11 |
| 9165099 | Adaptive clock management in emulation | Charles W. Selvidge, Sanjay Gupta, Amit Jain, Satish Kumar Agarwal | 2015-10-20 |