Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10410713 | Content addressable memory modeling in emulation and prototyping | Charles W. Selvidge, Sanjay Gupta, Krishnamurthy Suresh, Saurabh Gupta | 2019-09-10 |
| 9990452 | Low power corruption of memory in emulation | Krishnamurthy Suresh, Mukesh Gupta, Sanjay Gupta | 2018-06-05 |
| 9959379 | Hybrid compilation for FPGA prototyping | Sanjay Gupta | 2018-05-01 |
| 9305126 | Switching activity reduction through retiming | Charles W. Selvidge, Sanjay Gupta, Saurabh Gupta, Jeffrey W. Evans | 2016-04-05 |
| 8516411 | Register transfer level design compilation advisor | Sanjay Gupta, Charles W. Selvidge | 2013-08-20 |
| 8340222 | Parameter and scattered pilot based symbol timing recovery | Bernard Arambepola, Thushara Hewavithana | 2012-12-25 |