SJ

Sudhanshu Jayaswal

MG Mentor Graphics: 2 patents #191 of 698Top 30%
📍 Noida, IN: #227 of 795 inventorsTop 30%
Overall (All Time): #1,908,015 of 4,157,543Top 50%
2
Patents All Time

Issued Patents All Time

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
10657217 Latency test in networking system-on-chip verification Suresh Krishnamurthy, Deepak Garg, Saurabh Khaitan, Sanjay Gupta, John R. Stickley +4 more 2020-05-19
10521544 Traffic shaping in networking system-on-chip verification Krishnamurthy Suresh, Deepak Garg, Saurabh Khaitan, Sanjay Gupta, John R. Stickley +2 more 2019-12-31