CH

Ching-Cheng Huang

ME Megica: 52 patents #4 of 32Top 15%
QU Qualcomm: 7 patents #2,597 of 12,104Top 25%
WN Wistron Neweb: 1 patents #298 of 577Top 55%
NL National Applied Research Laboratories: 1 patents #194 of 506Top 40%
MA Megit Acquisition: 1 patents #5 of 12Top 45%
Overall (All Time): #26,546 of 4,157,543Top 1%
74
Patents All Time

Issued Patents All Time

Showing 26–50 of 74 patents

Patent #TitleCo-InventorsDate
7919867 Chip structure and process for forming the same Jin-Yuan Lee, Mou-Shiung Lin 2011-04-05
7915157 Chip structure and process for forming the same Jin-Yuan Lee, Mou-Shiung Lin 2011-03-29
7915734 Chip structure and process for forming the same Jin-Yuan Lee, Mou-Shiung Lin 2011-03-29
7906849 Chip structure and process for forming the same Jin-Yuan Lee, Mou-Shiung Lin 2011-03-15
7906422 Chip structure and process for forming the same Jin-Yuan Lee, Mou-Shiung Lin 2011-03-15
7898058 Integrated chip package structure using organic substrate and method of manufacturing the same Mou-Shiung Lin, Jin-Yuan Lee 2011-03-01
7863739 Low fabrication cost, fine pitch and high reliability solder bump Jin-Yuan Lee, Mou-Shiung Lin 2011-01-04
7796955 Expandable wireless transceiver Jiahn-Rong Gau, Cheng-Hsiung Hsu, Tzu-Ping Lin, Chen-Chia Huang 2010-09-14
7772341 Norbornene compounds with cross-linkable groups and their derivatives Der-Jang Liaw, Shou-Mau Hong, Ming-Hung Huang 2010-08-10
7728090 Norbornene compounds with cross-linkable groups and their derivatives Der-Jang Liaw, Shou-Mau Hong, Ming-Hung Huang 2010-06-01
7645915 Composite dressing Su-Huei Lai, Yung-Sheng Lin, Ting-Kai Leung 2010-01-12
7511376 Circuitry component with metal layer over die and extending to place not over die Mou-Shiung Lin, Jin-Yuan Lee 2009-03-31
7498196 Structure and manufacturing method of chip scale package Jin-Yuan Lee, Mou-Shiung Lin 2009-03-03
7482259 Chip structure and process for forming the same Jin-Yuan Lee, Mou-Shiung Lin 2009-01-27
7470988 Chip structure and process for forming the same Mou-Shiung Lin, Jin-Yuan Lee 2008-12-30
7468316 Low fabrication cost, fine pitch and high reliability solder bump Jin-Yuan Lee, Mou-Shiung Lin 2008-12-23
7465653 Reliable metal bumps on top of I/O pads after removal of test probe marks Chuen-Jye Lin, Ming-Ta Lei, Mou-Shiung Lin 2008-12-16
7413929 Integrated chip package structure using organic substrate and method of manufacturing the same Jin-Yuan Lee, Mou-Shiung Lin 2008-08-19
7397117 Chip package with die and substrate Mou-Shiung Lin, Jin-Yuan Lee 2008-07-08
7388055 Functional norbornenes and polymeric derivatives and fabrication thereof Der-Jang Liaw, Jing-Yang Ju, Jiun-Tyng Liaw 2008-06-17
7368509 Functional norbornenes and polymeric derivatives and fabrication thereof Der-Jang Liaw, Jing-Yang Ju, Jiun-Tyng Liaw 2008-05-06
7368508 Functional norbornenes and polymeric derivatives and fabrication thereof Der-Jang Liaw, Jing-Yang Ju, Jiun-Tyng Liaw 2008-05-06
7355288 Low fabrication cost, high performance, high reliability chip scale package Jin-Yuan Lee, Ming-Ta Lei, Chuen-Jye Lin 2008-04-08
7345365 Electronic component with die and passive device Jin-Yuan Lee, Mou-Shiung Lin 2008-03-18
7338890 Low fabrication cost, high performance, high reliability chip scale package Jin-Yuan Lee, Ming-Ta Lei, Chuen-Jye Lin 2008-03-04