Issued Patents All Time
Showing 126–146 of 146 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6091129 | Self-aligned trench isolated structure | — | 2000-07-18 |
| 6034882 | Vertically stacked field programmable nonvolatile memory and method of fabrication | Mark G. Johnson, Thomas H. Lee, Vivek Subramanian, Paul Michael Farmwald | 2000-03-07 |
| 6019658 | Fabrication of gated electron-emitting device utilizing distributed particles to define gate openings, typically in combination with spacer material to control spacing between gate layer and electron-emissive elements | Paul N. Ludwig, Duane A. Haven, John M. Macaulay, Christopher J. Spindt, N. Johan Knall | 2000-02-01 |
| 6016012 | Thin liner layer providing reduced via resistance | Ahmad Chatila, Kuantai Yeh, Daniel Arnzen, Roger Caldwell | 2000-01-18 |
| 6004874 | Method for forming an interconnect | — | 1999-12-21 |
| 5865659 | Fabrication of gated electron-emitting device utilizing distributed particles to define gate openings and utilizing spacer material to control spacing between gate layer and electron-emissive elements | Paul N. Ludwig, Duane A. Haven, John M. Macaulay, Christopher J. Spindt, N. Johan Knall | 1999-02-02 |
| 5830797 | Interconnect methods and apparatus | — | 1998-11-03 |
| 5830804 | Encapsulated dielectric and method of fabrication | Krishnaswamy Ramkumar | 1998-11-03 |
| 5710061 | Disposable post processing for semiconductor device fabrication | — | 1998-01-20 |
| 5693556 | Method of making an antifuse metal post structure | — | 1997-12-02 |
| 5686223 | Method for reduced pitch lithography | — | 1997-11-11 |
| 5652182 | Disposable posts for self-aligned non-enclosed contacts | — | 1997-07-29 |
| 5652084 | Method for reduced pitch lithography | — | 1997-07-29 |
| 5573971 | Planar antifuse and method of fabrication | — | 1996-11-12 |
| 5366929 | Method for making reliable selective via fills | Changhae Park, Rosemary Gettle | 1994-11-22 |
| 5091047 | Plasma etching using a bilayer mask | James G. Heard, Zoilo Cheng Ho Tan | 1992-02-25 |
| 5045150 | Plasma etching using a bilayer mask | James G. Heard, Zoilo Cheng Ho Tan | 1991-09-03 |
| 4883772 | Process for making a self-aligned silicide shunt | James G. Heard | 1989-11-28 |
| 4806504 | Planarization method | — | 1989-02-21 |
| 4489482 | Impregnation of aluminum interconnects with copper | Thomas Keyser, Michael E. Thomas, John M. Pierce | 1984-12-25 |
| 4443295 | Method of etching refractory metal film on semiconductor structures utilizing triethylamine and H.sub.2 O.sub.2 | Kenneth Radigan | 1984-04-17 |