Issued Patents All Time
Showing 76–100 of 234 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9184096 | Semiconductor structure and manufacturing method for the same | Guan-Ru Lee | 2015-11-10 |
| 9136277 | Three dimensional stacked semiconductor structure and method for manufacturing the same | Yen-Hao Shih | 2015-09-15 |
| 9123778 | Damascene conductor for 3D array | Yen-Hao Shih, Guanru Lee | 2015-09-01 |
| 9123579 | 3D memory process and structures | Chia-Jung Chiu, Chieh-Chun Lo | 2015-09-01 |
| 9117526 | Substrate connection of three dimensional NAND for improving erase performance | — | 2015-08-25 |
| 9093502 | String select line (SSL) of three-dimensional memory array and method of fabricating the same | — | 2015-07-28 |
| 9076964 | Methods for forming resistance random access memory structure | ChiaHua Ho, Kuang Yeu Hsieh | 2015-07-07 |
| 9076684 | 3D memory structure and manufacturing method of the same | — | 2015-07-07 |
| 9041077 | Semiconductor device and manufacturing method of the same | Shih-Hung Chen | 2015-05-26 |
| 9029216 | Memory and manufacturing method thereof | — | 2015-05-12 |
| 9019771 | Dielectric charge trapping memory cells with redundancy | Hsiang-Lan Lung, Yen-Hao Shih, Ming-Hsiu Lee | 2015-04-28 |
| 9018615 | Resistor random access memory structure having a defined small area of electrical contact | ChiaHua Ho, Kuang Yeu Hsieh | 2015-04-28 |
| 8962466 | Low temperature transition metal oxide for memory device | Feng-Min Lee, Wei-Chih Chien, Ming-Hsiu Lee, Chih-Chieh Yu | 2015-02-24 |
| 8937340 | Silicon on insulator and thin film transistor bandgap engineered split gate memory | Hang-Ting Lue | 2015-01-20 |
| 8933457 | 3D memory array including crystallized channels | — | 2015-01-13 |
| 8933536 | Polysilicon pillar bipolar transistor with self-aligned memory element | Hsiang-Lan Lung, Chung H. Lam, Bipin Rajendran | 2015-01-13 |
| 8927956 | Resistance type memory device | Ming-Daou Lee, Chia-Hua Ho, Kuang Yeu Hsieh | 2015-01-06 |
| 8907316 | Memory cell access device having a pn-junction with polycrystalline and single crystal semiconductor regions | Hsiang-Lan Lung, Yen-Hao Shih, Yi-Chou Chen, Shih-Hung Chen | 2014-12-09 |
| 8859343 | 3D semiconductor structure and manufacturing method thereof | — | 2014-10-14 |
| 8846549 | Method of forming bottom oxide for nitride flash memory | Yen-Hao Shih, Hang-Ting Lue, Kuang Yeu Hsieh | 2014-09-30 |
| 8816423 | Semiconducting multi-layer structure and method for manufacturing the same | Yen-Hao Shih | 2014-08-26 |
| 8772106 | Graded metal oxide resistance based semiconductor memory device | Ming-Daou Lee, Kuang Yeu Hsieh, Wei-Chih Chien, Chien-Hung Yeh | 2014-07-08 |
| 8735969 | Semiconductor structure and manufacturing method of the same | Yen-Hao Shih, Shih-Chang Tsai | 2014-05-27 |
| 8722469 | Memory cell and process for manufacturing the same | Ming-Daou Lee, Chia-Hua Ho, Kuang Yeu Hsieh | 2014-05-13 |
| 8704205 | Semiconductor structure with improved capacitance of bit line | Shih-Hung Chen, Hang-Ting Lue, Kuang Yeu Hsieh, Yen-Hao Shih | 2014-04-22 |