Issued Patents All Time
Showing 276–300 of 336 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7443753 | Memory structure, programming method and reading method therefor, and memory control circuit thereof | Chung-Kuang Chen, Ful-Long Ni | 2008-10-28 |
| 7426139 | Dynamic program and read adjustment for multi-level cell memory array | Wen-Chiao Ho, Chin-Hung Chang, Kuen-Long Chang | 2008-09-16 |
| 7423913 | Structures and methods for enhancing erase uniformity in a nitride read-only memory array | Ching-Chung Lin, Ken-Hui Chen, Nai-Ping Kuo, Han-Sung Chen, Wen-Yi Hsieh | 2008-09-09 |
| 7382656 | Nonvolatile memory with program while program verify | Wen-Chiao Ho, Yi-Chun Shih, Chin-Hung Chang | 2008-06-03 |
| 7355903 | Semiconductor device including memory cells and current limiter | Chuan-Ying Yu, Han-Sung Chen, Nai-Ping Kuo, Ching-Chung Lin, Kuen-Long Chang | 2008-04-08 |
| 7345917 | Non-volatile memory package and method of reading stored data from a non-volatile memory array | Su-Chueh Lo, Han-Sung Chen | 2008-03-18 |
| 7295471 | Memory device having a virtual ground array and methods using program algorithm to improve read margin loss | Wen-Yi Hsieh, Nai-Ping Kuo, Ken-Hui Chen | 2007-11-13 |
| 7289359 | Systems and methods for using a single reference cell in a dual bit flash memory | Nai-Ping Kuo, Han-Sung Chen, Ken-Hui Chen | 2007-10-30 |
| 7257029 | Systems and methods for improved programming of flash based devices | Chuan-Ying Yu | 2007-08-14 |
| 7254077 | Circuit and method for high speed sensing | Su-Chueh Lo, Shou-Wei Huang | 2007-08-07 |
| 7236404 | Structures and methods for enhancing erase uniformity in an NROM array | Ching-Chung Lin, Ken-Hui Chen, Nai-Ping Kuo, Han-Sung Chen, Wen-Yi Hsieh | 2007-06-26 |
| 7180780 | Multi-level-cell programming methods of non-volatile memories | Wen-Chiao Ho, Chin-Hung Chang, Kuen-Long Chang | 2007-02-20 |
| 7180782 | Read source line compensation in a non-volatile memory | Chuan-Ying Yu, Nai-Ping Kuo, Ken-Hui Chen, Han-Sung Chen | 2007-02-20 |
| 7130222 | Nonvolatile memory with program while program verify | Wen-Chiao Ho, Yi-Chun Shih, Chin-Hung Chang | 2006-10-31 |
| 7088630 | Circuit and method for high speed sensing | Su-Chueh Lo, Shou-Wei Huang | 2006-08-08 |
| 6930926 | Method for erasing a flash EEPROM | Yu-Shen Lin, Shin-Jang Shen, Ho-Chun Liou, Shuo-Nan Hung | 2005-08-16 |
| 6868009 | Flash memory device with byte erase | Chin-Hung Chang | 2005-03-15 |
| 6845052 | Dual reference cell sensing scheme for non-volatile memory | Hsin-Yi Ho, Nai-Ping Kuo, Gin-Liang Chen, Wen-Chiao Ho, Ho-Chun Liou | 2005-01-18 |
| 6795350 | Circuit and method for tuning a reference bit line loading to a sense amplifier by optionally cutting a capacitive reference bit line | Han-Sung Chen, Kuo-Yu Liao, Chen-Hao Po | 2004-09-21 |
| 6665216 | Apparatus and system for reading non-volatile memory with dual reference cells | Hsin-Yi Ho, Nai-Ping Kuo, Gin-Laing Chen, Wen-Chiao Ho, Ho-Chun Liou | 2003-12-16 |
| 6618848 | Method for designing circuit layout of non-neighboring metal bit lines to reduce coupling effect | Han-Sung Chen, Kuo-Yu Liao, Yung-Feng Lin, Ho-Chun Liou | 2003-09-09 |
| 6608499 | Method for compensating a threshold voltage of a neighbor bit | Tseng-Yi Liu, Han-Sung Chen, Cheng-Jye Liu, Chia-Hsing Chen | 2003-08-19 |
| 6580287 | Voltage-boosting generator for reducing effects due to operating voltage variation and temperature change | Hsien-Wen Hsu, Yu-Shen Lin, Ho-Chun Liou | 2003-06-17 |
| 6573780 | Four-phase charge pump with lower peak current | Yu-Shen Lin, Ray-Lin Wan | 2003-06-03 |
| 6563735 | NOR-structured semiconductor memory device | Hsin-Chien Chen, Gin-Liang Chen, Hsin-Yi Ho, Ho-Chun Liou | 2003-05-13 |