CY

Chin-Cheng Yang

MC Macronix International Co.: 67 patents #18 of 1,241Top 2%
Ncr: 1 patents #1,404 of 2,952Top 50%
Overall (All Time): #30,497 of 4,157,543Top 1%
68
Patents All Time

Issued Patents All Time

Showing 26–50 of 68 patents

Patent #TitleCo-InventorsDate
9097975 Double patterning by PTD and NTD process 2015-08-04
9082802 Wafer centering hardware design and process 2015-07-14
8999838 Semiconductor devices and methods of manufacturing the same 2015-04-07
8847122 Method and apparatus for transferring substrate 2014-09-30
8835100 Double patterning by PTD and NTD process 2014-09-16
8835103 Lithography process and structures 2014-09-16
8804096 Apparatus for and method of wafer edge exposure 2014-08-12
8530147 Patterning process 2013-09-10
8383512 Method for making multilayer connection structure Shih-Hung Chen, Hang-Ting Lue, Hong-Ji Lee 2013-02-26
8367981 Baking apparatus, baking method and method of reducing gap width 2013-02-05
8343713 Method for patterning material layer Chih-Hao Huang, Tzong-Hsien Wu, Tien-Chu Yang 2013-01-01
8278770 Overlay mark 2012-10-02
8232203 Methods of manufacturing memory devices 2012-07-31
8183123 Method of forming mark in IC-fabricating process 2012-05-22
8084872 Overlay mark, method of checking local aligmnent using the same and method of controlling overlay based on the same 2011-12-27
8076758 Wafer structure 2011-12-13
8049345 Overlay mark Chih-Hao Huang 2011-11-01
8012675 Method of patterning target layer on substrate 2011-09-06
7998826 Method of forming mark in IC-fabricating process 2011-08-16
7952213 Overlay mark arrangement for reducing overlay shift Chun-Chung Huang 2011-05-31
7939225 Mask for controlling line end shortening and corner rounding arising from proximity effects Chiao-Wen Yeh, Chih-Haw Huang 2011-05-10
7927960 Method of improving overlay performance in semiconductor manufacture Chih-Hao Huang 2011-04-19
7923175 Photomask structure Chun-Chung Huang 2011-04-12
7901872 Exposure process and photomask set used therein Chih-Hao Huang 2011-03-08
7880274 Method of enabling alignment of wafer in exposure step of IC process after UV-blocking metal layer is formed over the whole wafer 2011-02-01