Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6961915 | Design methodology for dummy lines | William Loh, Benjamin Mbouombouo | 2005-11-01 |
| 6830984 | Thick traces from multiple damascene layers | Richard T. Schultz | 2004-12-14 |
| 6815342 | Low resistance metal interconnect lines and a process for fabricating them | Chuan-Cheng Cheng, Sethuraman Lakshminarayanan, Hong Ying | 2004-11-09 |
| 6710453 | Integrated circuit containing redundant core and peripheral contacts | Payman Zarkesh-Ha | 2004-03-23 |
| 6617181 | Flip chip testing | Payman Zarkesh-Ha | 2003-09-09 |
| 6614283 | Voltage level shifter | Venkatesh P. Gopinath, Todd A. Randazzo | 2003-09-02 |
| 6566244 | Process for improving mechanical strength of layers of low k dielectric material | Charles E. May, Venkatesh P. Gopinath | 2003-05-20 |