Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6988230 | Test arrangement for assemblages of intergrated circuit blocks | Hubertus Gerardus Hendrikus Vermeulen, Thomas Waayers | 2006-01-17 |
| 6883129 | Electronic circuit and method for testing | Alexander Sebastian Biewenga, Leon Van De Logt, Franciscus Gerardus Maria De Jong | 2005-04-19 |
| 6829736 | Method of testing a memory | Erik Jan Marinissen, Paul Wielage | 2004-12-07 |
| 6807505 | Circuit with interconnect test unit | Franciscus Gerardus Maria De Jong, Mathias N. M. Muris, Robertus M. W. Raaijmakers | 2004-10-19 |
| 6721911 | Method and apparatus for testing a memory array using compressed responses | Erik Jan Marinissen, Paul Wielage | 2004-04-13 |
| 6622108 | Circuit with interconnect test unit and a method of testing interconnects between a first and a second electronic circuit | Franciscus Gerardus Maria De Jong, Mathias N. M. Muris, Robertus M. W. Raaijmakers | 2003-09-16 |
| 6131173 | Clock domain test isolation | Johan C. Meirlevede, Gerardus A. A. Bos, Jacobus A. M. Jacobs | 2000-10-10 |