GE

Gregory Ehmann

Philips: 8 patents #553 of 7,731Top 8%
Meta: 6 patents #1,187 of 6,845Top 20%
VT Vlsi Technology: 2 patents #227 of 594Top 40%
NB Nxp B.V.: 1 patents #1,722 of 3,591Top 50%
SO Sonics: 1 patents #37 of 52Top 75%
Overall (All Time): #249,877 of 4,157,543Top 7%
18
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12032839 Hierarchical power management of memory for artificial reality systems Shrirang Madhav Yardi, Ennio Salemi, George Spatz, Jeffrey W. Ryden 2024-07-09
11487594 Artificial reality system with inter-processor communication (IPC) 2022-11-01
11474970 Artificial reality system with inter-processor communication (IPC) Jun Wang, Neeraj Upasani, Wojciech Stefan Powiertowski, Drew E. Wingard, Marco Brambilla +2 more 2022-10-18
11231769 Sequencer-based protocol adapter Drew E. Wingard 2022-01-25
10921874 Hardware-based operating point controller for circuit regions in an integrated circuit Drew E. Wingard 2021-02-16
10901490 Operating point controller for circuit regions Drew E. Wingard 2021-01-26
10152112 Power manager with a power switch arbitrator Drew E. Wingard, Neal T. Wingen 2018-12-11
7308625 Delay-fault testing method, related system and circuit Neal T. Wingen 2007-12-11
7085950 Parallel data communication realignment of data sent in multiple groups D. C. Sessions, Timothy Pontius 2006-08-01
7020807 Data communication bus traffic generator arrangement Neil Gregie, Arjan Bink 2006-03-28
6931524 System for bus monitoring using a reconfigurable bus monitor which is adapted to report back to CPU in response to detecting certain selected events Swati Saxena 2005-08-16
6920576 Parallel data communication having multiple sync codes 2005-07-19
6839862 Parallel data communication having skew intolerant data groups David R. Evoy, Timothy Pontius 2005-01-04
6701390 FIFO buffer that can read and/or write multiple and/or selectable number of data words per bus cycle 2004-03-02
6611158 Method and system using a common reset and a slower reset clock 2003-08-26
6507887 Binary data memory design with data stored in low-power sense Timothy Pontius 2003-01-14
5963454 Method and apparatus for efficiently implementing complex function blocks in integrated circuit designs Kenneth Alan Dockser 1999-10-05
5666068 GTL input receiver with hysteresis 1997-09-09