Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11735562 | Sensor package structure | CHIEN-CHEN LEE | 2023-08-22 |
| 11133348 | Sensor package structure and sensing module thereof | LI-CHUN HUNG, CHIEN-CHEN LEE, Jian-Ru Chen | 2021-09-28 |
| 10868062 | Sensor package structure | CHIEN-CHEN LEE, Chien LIN, Jian-Ru Chen | 2020-12-15 |
| 10600829 | Package base core and sensor package structure | Chung-Hsin Hsin, Chien LIN, KUN-CHIH HSIEH | 2020-03-24 |
| 10411055 | Sensor package structure | Chun-Hua Chuang, Wen-Chung Huang, Chung-Hsien Hsin, LI-CHUN HUNG | 2019-09-10 |
| 9184331 | Method for reducing tilt of optical unit during manufacture of image sensor | Chun-Hua Chuang, Chien-Wei Chang, Chung-Hsien Hsin, Chun-Lung Huang, Hsiu-Wen Tu +4 more | 2015-11-10 |
| 8450137 | Method for reducing tilt of transparent window during manufacturing of image sensor | Chun-Hua Chuang, Yao-Nien Chuang, Tiao-Mu Hsu, Chien-Wei Chang, Chien-Hen Lin +1 more | 2013-05-28 |
| 8004602 | Image sensor structure and integrated lens module thereof | Chung-Hsien Hsin, Chun-Hua Chuang, Chien-Wei Chang, Chien-Hen Lin | 2011-08-23 |
| 7598580 | Image sensor module package structure with supporting element | Chung-Hsien Hsin, Chun-Hua Chuang, Chien-Wei Chang, Chien-Hen Lin | 2009-10-06 |
| 7554599 | Image sensor module with air escape hole and a method for manufacturing the same | Hsiu-Wen Tu, Mon Ho, Jason Chuang, Chung-Hsien Hsin, Wei-Lin Chang | 2009-06-30 |
| 7423334 | Image sensor module with a protection layer and a method for manufacturing the same | Hsiu-Wen Tu, Mon Ho, Chung-Hsien Hsin | 2008-09-09 |
| 7235869 | Integrated circuit package having a resistant layer for stopping flowed glue | Pierre Liu | 2007-06-26 |
| 6642137 | Method for manufacturing a package structure of integrated circuits | Nai Hua Yeh, Jichen Wu | 2003-11-04 |
| 6642554 | Memory module structure | Nai Hua Yeh, Chief Lin, C. Cheng, Kuang-Yu Fan, Ren Long Kau +5 more | 2003-11-04 |
| 6501187 | Semiconductor package structure having central leads and method for packaging the same | Nai Hua Yeh, Chief Lin, Ching-Shui CHENG, Allis Chen | 2002-12-31 |
| 6472736 | Stacked structure for memory chips | Nai Hua Yeh | 2002-10-29 |
| 6400007 | Stacked structure of semiconductor means and method for manufacturing the same | Jichen Wu, Meng-Ru Tsai, Nai Hua Yeh | 2002-06-04 |