Issued Patents All Time
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| RE37059 | Wiring pattern of semiconductor integrated circuit device | Masahiro Abe, Tomie Yamamoto | 2001-02-20 |
| 6015754 | Chemical mechanical polishing apparatus and method | Yoshitaka Matsui, Takeshi Kubota, Toshihiko Kitamura | 2000-01-18 |
| 5655954 | Polishing apparatus | Toshio Oishi, Shoichi Shin, Masafumi Tsunada, Masahiro Ishida | 1997-08-12 |
| 5523627 | Wiring pattern of semiconductor integrated circuit device | Masahiro Abe, Tomie Yamamoto | 1996-06-04 |
| 5411916 | Method for patterning wirings of semiconductor integrated circuit device | Masahiro Abe, Tomie Yamamoto | 1995-05-02 |
| 5258328 | Method of forming multilayered wiring structure of semiconductor device | Takeshi Sunada | 1993-11-02 |
| 5175115 | Method of controlling metal thin film formation conditions | Masahiro Abe, Toshihiko Katsura, Masaharu Aoyama | 1992-12-29 |
| 5169407 | Method of determining end of cleaning of semiconductor manufacturing apparatus | Masahiro Abe, Osamu Hirata | 1992-12-08 |
| 5126819 | Wiring pattern of semiconductor integrated circuit device | Masahiro Abe, Tomie Yamamoto | 1992-06-30 |
| 5103287 | Multi-layered wiring structure of semiconductor integrated circuit device | Masahiro Abe, Toshihiko Katsura | 1992-04-07 |
| 5100476 | Method and apparatus for cleaning semiconductor devices | Osamu Hirata, Masahiro Abe | 1992-03-31 |
| 5055906 | Semiconductor device having a composite insulating interlayer | Masahiro Abe, Tomie Yamamoto | 1991-10-08 |
| 5044311 | Plasma chemical vapor deposition apparatus | Masahiro Abe | 1991-09-03 |
| 5016663 | Method of determining end of cleaning of semiconductor manufacturing apparatus | Masahiro Abe, Osamu Hirata | 1991-05-21 |
| 4952528 | Photolithographic method for manufacturing semiconductor wiring patterns | Masahiro Abe, Toshihiko Katsura | 1990-08-28 |
| 4857141 | Method of forming holes in semiconductor integrated circuit device | Masahiro Abe | 1989-08-15 |
| 4728627 | Method of making multilayered interconnects using hillock studs formed by sintering | Masahiro Abe, Masaharu Aoyama | 1988-03-01 |
| 4634496 | Method for planarizing the surface of an interlayer insulating film in a semiconductor device | Masahiro Abe, Masaharu Aoyama | 1987-01-06 |
| 4613888 | Semiconductor device of multilayer wiring structure | Masahiro Abe, Masaharu Aoyama, Takashi Ajima | 1986-09-23 |