Issued Patents All Time
Showing 26–41 of 41 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5890186 | Memory circuit with built-in cache memory | Katsuhiko Sato, Shinji Miyano, Tohru Furuyama | 1999-03-30 |
| 5881006 | Semiconductor memory device | Shinji Miyano, Kenji Numata | 1999-03-09 |
| 5754481 | Clock synchronous type DRAM with latch | Kenji Numata, Katsuhiko Sato, Ryo Haga, Shinji Miyano, Tohru Furuyama | 1998-05-19 |
| 5732040 | Multibit DRAM | — | 1998-03-24 |
| 5706229 | Semiconductor memory device | Shinji Miyano, Kenji Numata | 1998-01-06 |
| 5698876 | Memory standard cell macro for semiconductor device | Shinji Miyano, Katsuhiko Sato, Kenji Numata | 1997-12-16 |
| 5659507 | Clock synchronous type DRAM with data latch | Kenji Numata, Katsuhiko Sato, Ryo Haga, Shinji Miyano, Tohru Furuyama | 1997-08-19 |
| 5640365 | Semiconductor memory device with a decoding peripheral circuit for improving the operation frequency | Keniti Imamiya, Shinji Miyano, Katsuhiko Sato | 1997-06-17 |
| 5640351 | Semiconductor memory circuit having data buses common to a plurality of memory cell arrays | Shinji Miyano, Katsuhiko Sato, Kenji Numata | 1997-06-17 |
| 5608674 | Semiconductor memory device | Kenji Numata | 1997-03-04 |
| 5590084 | Semiconductor memory device having a column selector | Shinji Miyano, Katsuhiko Sato | 1996-12-31 |
| 5555523 | Semiconductor memory device | Ryo Haga, Shinji Miyano, Kenji Numata | 1996-09-10 |
| 5504709 | Semiconductor memory device | Katsuhiko Sato, Shinji Miyano | 1996-04-02 |
| 5426390 | Circuit for generating input transition detection pulse | Masataka Matsui, Kouichi Satou | 1995-06-20 |
| 5363336 | Semiconductor memory device controlling the supply voltage on BIT lines | — | 1994-11-08 |
| 5299164 | Semiconductor memory device having redundant circuit | Hideki Takeuchi, Shigeyuki Hayakawa | 1994-03-29 |