Issued Patents All Time
Showing 1–25 of 53 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6381186 | Dynamic random access memory | Junichi Okamura | 2002-04-30 |
| 6317366 | Dynamic random access memory | Junichi Okamura | 2001-11-13 |
| 6307796 | Dynamic random access memory | Junichi Okamura | 2001-10-23 |
| RE37184 | Semiconductor memory and screening test method thereof | Natsuki Kushiyama, Kenji Numata | 2001-05-22 |
| 6166975 | Dynamic random access memory | Junichi Okamura | 2000-12-26 |
| 6101148 | Dynamic random access memory | Junichi Okamura | 2000-08-08 |
| 5890186 | Memory circuit with built-in cache memory | Katsuhiko Sato, Shinji Miyano, Tomoaki Yabe | 1999-03-30 |
| 5754481 | Clock synchronous type DRAM with latch | Tomoaki Yabe, Kenji Numata, Katsuhiko Sato, Ryo Haga, Shinji Miyano | 1998-05-19 |
| 5673229 | Dynamic random access memory | Junichi Okamura | 1997-09-30 |
| 5659507 | Clock synchronous type DRAM with data latch | Tomoaki Yabe, Kenji Numata, Katsuhiko Sato, Ryo Haga, Shinji Miyano | 1997-08-19 |
| 5568436 | Semiconductor device and method of screening the same | — | 1996-10-22 |
| 5553024 | Semiconductor memory utilizing RAS and CAS signals to control the latching of first and second read or write data | — | 1996-09-03 |
| 5532963 | Semiconductor memory and screening test method thereof | Natsuki Kushiyama, Kenji Numata | 1996-07-02 |
| 5525820 | Semiconductor memory cell | — | 1996-06-11 |
| 5506540 | Bias voltage generation circuit | Kiyofumi Sakurai | 1996-04-09 |
| 5500815 | Semiconductor memory | Satoru Takase | 1996-03-19 |
| 5479370 | Semiconductor memory with bypass circuit | Donald C. Stark | 1995-12-26 |
| 5444652 | Semiconductor memory device having a memory cell unit including a plurality of transistors connected in series | — | 1995-08-22 |
| 5432733 | Semiconductor memory device | — | 1995-07-11 |
| 5428576 | Semiconductor device and method of screening the same | — | 1995-06-27 |
| 5410512 | Semiconductor memory device | Satoru Takase, Donald C. Stark, Natsuki Kushiyama, Kiyofumi Sakurai, Hiroyuki Noji +1 more | 1995-04-25 |
| 5410505 | Semiconductor memory device having a memory cell unit including a plurality of transistors connected in series | — | 1995-04-25 |
| 5386127 | Semiconductor device having groups of pads which receive the same signal | — | 1995-01-31 |
| 5383160 | Dynamic random access memory | — | 1995-01-17 |
| 5377152 | Semiconductor memory and screening test method thereof | Natsuki Kushiyama, Kenji Numata | 1994-12-27 |