Issued Patents All Time
Showing 1–25 of 45 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12182275 | Storage data deletion management system and apparatus | Kazusa Tomonaga, Yoshihiro Ohba | 2024-12-31 |
| 11868618 | Data reading and writing processing from and to a semiconductor memory and a memory of a host device by using first and second interface circuits | Kenichi Maeda | 2024-01-09 |
| 11868285 | Memory controller configured to transmit interrupt signal if volatile memory has no data corresponding to address requested from source | Toshio Fujisawa, Nobuhiro Kondo, Shoji Sawamura, Kenichi Maeda | 2024-01-09 |
| 11537291 | Data reading and writing processing from and to a semiconductor memory and a memory of a host device by using first and second interface circuits | Kenichi Maeda | 2022-12-27 |
| 11537536 | Memory controller configured to transmit interrupt signal if volatile memory has no data corresponding to address requested from source | Toshio Fujisawa, Nobuhiro Kondo, Shoji Sawamura, Kenichi Maeda | 2022-12-27 |
| 10949092 | Memory system with block rearrangement to secure a free block based on read valid first and second data | Kenichi Maeda | 2021-03-16 |
| 10929315 | Memory controller configured to transmit interrupt signal if volatile memory has no data corresponding to address requested from source | Toshio Fujisawa, Nobuhiro Kondo, Shoji Sawamura, Kenichi Maeda | 2021-02-23 |
| 10776007 | Memory management device predicting an erase count | Masaki Miyagawa, Hiroshi Nozue, Kazuhiro Kawagome, Hiroto Nakai, Hiroyuki Sakamoto +5 more | 2020-09-15 |
| 10331356 | Data writing processing into memory of a semiconductor memory device by using a memory of a host device | Kenichi Maeda | 2019-06-25 |
| 10310747 | Memory management device and method | Tsutomu Owa, Masaki Miyagawa, Mari Takada | 2019-06-04 |
| 10042786 | Memory controller configured to transmit interrupt signal if volatile memory has no data corresponding to address requested from source | Toshio Fujisawa, Nobuhiro Kondo, Shoji Sawamura, Kenichi Maeda | 2018-08-07 |
| 9870155 | Information processing device including host device and semiconductor memory device having a block rearrangement to secure free blocks | Kenichi Maeda | 2018-01-16 |
| 9542117 | Information processing device including host device and semiconductor memory device having a plurality of address conversion information | Kenichi Maeda | 2017-01-10 |
| 9530499 | Semiconductor memory device and information processing device | Yosuke Bando, Atsuhiro Kinoshita | 2016-12-27 |
| 9524121 | Memory device having a controller unit and an information-processing device including a memory device having a controller unit | Kenichi Maeda, Nobuhiro Kondo | 2016-12-20 |
| 9418044 | Configuring selected component-processors operating environment and input/output connections based on demand | Masaaki Oka, Akio Ohba, Junichi Asano, Junichi Naoi, Jiro Amemiya | 2016-08-16 |
| 9286206 | Memory system | Satoshi Kaburaki | 2016-03-15 |
| 9280466 | Information processing device including memory management device managing access from processor to memory and memory management method | Hiroto Nakai, Hiroyuki Sakamoto, Kenichi Maeda, Masaki Miyagawa, Hiroshi Nozue +1 more | 2016-03-08 |
| 9268706 | Information processing device including host device and semiconductor memory device having plurality of address conversion information | Kenichi Maeda | 2016-02-23 |
| 9235507 | Memory management device and method | Tsutomu Owa, Masaki Miyagawa, Mari Takada | 2016-01-12 |
| 8880836 | Memory management device and method | Tsutomu Owa, Masaki Miyagawa, Mari Takada | 2014-11-04 |
| 8738851 | Device and memory system for swappable memory | Hiroto Nakai, Hiroyuki Sakamoto, Kenichi Maeda | 2014-05-27 |
| 8645612 | Information processing device and information processing method | Goh Uemura, Tsutomu Owa | 2014-02-04 |
| 8612692 | Variable write back timing to nonvolatile semiconductor memory | Kenta Yasufuku, Masaki Miyagawa, Goh Uemura, Tsutomu Owa, Tsutomu Unesaki | 2013-12-17 |
| 8458436 | Device and memory system for memory management using access frequency information | Hiroto Nakai, Hiroyuki Sakamoto, Kenichi Maeda | 2013-06-04 |