Issued Patents All Time
Showing 1–25 of 31 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12384624 | Storage device and control method | Yasuhito Yoshimizu, Takashi Fukushima, Tatsuro HITOMI, Arata Inoue, Masayuki Miura +3 more | 2025-08-12 |
| 12204765 | Memory system | Tomoya Sanuki, Keisuke NAKATSUKA | 2025-01-21 |
| 12142324 | Semiconductor storage device and system | Tomoya Sanuki, Keisuke NAKATSUKA, Daisuke Fujiwara | 2024-11-12 |
| 11942176 | Semiconductor memory device | Tomoya Sanuki, Xu Li, Masayuki Miura, Takayuki Miyazaki, Hiroto Nakai +2 more | 2024-03-26 |
| 11923325 | Storage system, memory chip unit, and wafer | Yasuhito Yoshimizu, Takashi Fukushima, Tatsuro HITOMI, Arata Inoue, Masayuki Miura +3 more | 2024-03-05 |
| 11868285 | Memory controller configured to transmit interrupt signal if volatile memory has no data corresponding to address requested from source | Nobuhiro Kondo, Shoji Sawamura, Kenichi Maeda, Atsushi Kunimatsu | 2024-01-09 |
| 11847050 | Nonvolatile memory, memory system, and control method of nonvolatile memory | Daisuke Iwai, Keigo Hara | 2023-12-19 |
| 11756946 | Semiconductor storage device | Tomoya Sanuki, Hiroshi Maejima, Takashi Maeda | 2023-09-12 |
| 11579796 | Memory system | Tomoya Sanuki, Yuta Aiba, Hitomi TANAKA, Masayuki Miura, Mie Matsuo +1 more | 2023-02-14 |
| 11537536 | Memory controller configured to transmit interrupt signal if volatile memory has no data corresponding to address requested from source | Nobuhiro Kondo, Shoji Sawamura, Kenichi Maeda, Atsushi Kunimatsu | 2022-12-27 |
| 11422712 | Storage device and storage system including a memory to store a check code for an integrity check | Yasuhito Yoshimizu, Takashi Fukushima, Tatsuro HITOMI, Arata Inoue, Masayuki Miura +3 more | 2022-08-23 |
| 11417642 | Semiconductor storage device | Tomoya Sanuki, Hiroshi Maejima, Takashi Maeda | 2022-08-16 |
| 10929315 | Memory controller configured to transmit interrupt signal if volatile memory has no data corresponding to address requested from source | Nobuhiro Kondo, Shoji Sawamura, Kenichi Maeda, Atsushi Kunimatsu | 2021-02-23 |
| 10467020 | Memory device, and information-processing device | Yuji Izumi, Kenichi Maeda, Kenji Funaoka, Reina NISHINO, Nobuhiro Kondo | 2019-11-05 |
| 10146483 | Memory system | Reina NISHINO, Kenichi Maeda, Kenji Funaoka, Nobuhiro Kondo | 2018-12-04 |
| 10061515 | Information processing apparatus and memory system | Masanori Yamato, Shigenori Sugimoto, Naoto Oshiyama | 2018-08-28 |
| 10042786 | Memory controller configured to transmit interrupt signal if volatile memory has no data corresponding to address requested from source | Nobuhiro Kondo, Shoji Sawamura, Kenichi Maeda, Atsushi Kunimatsu | 2018-08-07 |
| 9720866 | Interface circuit executing protocol control in compliance with first and second interface standards | Ken Hamada, Nobuhiro Kondo | 2017-08-01 |
| 9396141 | Memory system and information processing device by which data is written and read in response to commands from a host | Kenichi Maeda, Nobuhiro Kondo, Kenichiro Yoshii, Keigo Hara | 2016-07-19 |
| 8902657 | Semiconductor memory device and controller | Hitoshi Iwai, Shirou Fujita, Hiroshi Sukegawa, Tokumasa Hara | 2014-12-02 |
| 8902670 | Semiconductor memory device | Tokumasa Hara, Hiroshi Sukegawa, Shirou Fujita, Masaki UNNO, Masanobu Shirakawa | 2014-12-02 |
| 8552784 | Semiconductor integrated circuit for generating clock signal(s) | Hideo Kasami | 2013-10-08 |
| 8312232 | Cache memory control circuit and processor for selecting ways in which a cache memory in which the ways have been divided by a predeterminded division number | — | 2012-11-13 |
| 8065486 | Cache memory control circuit and processor | — | 2011-11-22 |
| 7808293 | Clock distribution circuit | — | 2010-10-05 |