Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7895552 | Extracting, visualizing, and acting on inconsistencies between a circuit design and its abstraction | Vigyan Singhal, Soe Myint, Chung-Wah Norris Ip | 2011-02-22 |
| 7647572 | Managing formal verification complexity of designs with multiple related counters | Chung-Wah Norris Ip, Lawrence Loh, Vigyan Singhal | 2010-01-12 |
| 7418678 | Managing formal verification complexity of designs with counters | Chung-Wah Norris Ip, Lawrence Loh, Vigyan Singhal | 2008-08-26 |
| 7237208 | Managing formal verification complexity of designs with datapaths | Chung-Wah Norris Ip, Lawrence Loh, Harry D. Foster | 2007-06-26 |
| 7159198 | System and method for identifying design efficiency and effectiveness parameters for verifying properties of a circuit model | Chung-Wah Norris Ip, Lawrence Loh, Vigyan Singhal, Soe Myint | 2007-01-02 |
| 7065726 | System and method for guiding and optimizing formal verification for a circuit design | Vigyan Singhal, Joseph E. Higgins, Chung-Wah Norris Ip | 2006-06-20 |