Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
MA

Muhammad Afsar — 19 Patents

IPIpcomm: 7 patents #2 of 15Top 15%
IBM: 4 patents #21,783 of 70,183Top 35%
Siemens Aktiengesellschaft: 3 patents #4,667 of 22,248Top 25%
VTVia Telecom: 3 patents #18 of 75Top 25%
Motorola: 2 patents #5,346 of 14,142Top 40%
Infineon Technologies Ag: 1 patents #4,631 of 446Top 1040%
San Diego, CA: #2,265 of 23,606 inventorsTop 10%
California: #31,067 of 386,348 inventorsTop 9%
Overall (All Time): #229,345 of 4,157,543Top 6%
19 Patents All Time
Muhammad Afsar has been granted 19 US patents while listed as an inventor at Ipcomm. The first was granted in 1997 and the most recent in May 2018. Muhammad Afsar ranks #229,345 of 4,157,543 US inventors in our database (top 5.5%). Patent records list Muhammad Afsar in San Diego, CA, US.

Issued Patents All Time

Showing 1–19 of 19 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
9968840 Method and apparatus to provide haptic and visual feedback of skier foot motion and forces transmitted to the ski boot Stanislaw Czaja, Andrzej Bachleda-Curus 2018-05-15
9674759 Integrating mobile femto-cell access point into home appliance network Stanislaw Czaja 2017-06-06
9600635 Medication dispensing system Stanislaw Czaja, Ilona Stawski 2017-03-21
9210271 Wireless social and safety network Stanislaw Czaja 2015-12-08
9031605 Mobile femto-cell in a wireless safety network Stanislaw Czaja 2015-05-12
9020782 Adaptive vibration control for ski Stanislaw Czaja, Grzegorz Staszczuk 2015-04-28
8990048 Adaptive ski bindings system Stanislaw Czaja, Andrzej Bachleda-Curus, Ilona Stawski 2015-03-24
8989820 Method for suspending transmission and reception of text messages and phone calls Stanislaw Czaja, Ilona Stawski, Byung K. Yi 2015-03-24
7672250 Multi-carrier wireless communication access terminal and data transmission method Stanislaw Czaja 2010-03-02
7340667 Method and/or apparatus implemented in hardware to discard bad logical transmission units (LTUs) Alon Saado 2008-03-04
7046066 Method and/or apparatus for generating a write gated clock signal Alon Saado, Linley M. Young 2006-05-16
6401193 Dynamic data prefetching based on program counter and addressing mode Klaus Oberlaender 2002-06-04 $169,000
6226707 System and method for arranging, accessing and distributing data to achieve zero cycle penalty for access crossing a cache line Venkat Mattela 2001-05-01 $154,000
6085315 Data processing device with loop pipeline Rod G. Fleck, Venkat Mattela, Eric Chesters 2000-07-04
6040998 Memory activation devices and methods Chih-Ta Star Sung, Venkat Mattela, Balraj Singh, Chih-Teng Hung 2000-03-21
5812812 Method and system of implementing an early data dependency resolution mechanism in a high-performance data processing system utilizing out-of-order instruction issue Romesh Mangho Jessani, Soummya Mallick, Robert G. McDonald, Mukesh Sharma 1998-09-22
5765215 Method and system for efficient rename buffer deallocation within a processor Soummya Mallick, Rajesh B. Patel 1998-06-09
5751946 Method and system for detecting bypass error conditions in a load/store unit of a superscalar processor Christopher A. Freymuth 1998-05-12 $13,997,000
5664120 Method for executing instructions and execution unit instruction reservation table within an in-order completion processor Soummya Mallick 1997-09-02 $11,536,000