Issued Patents All Time
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11221798 | Write/read turn techniques based on latency tolerance | Gregory S. Mathews, Kai Lun Hsiung, Lakshmi Narasimha Murthy Nukala, Rakesh L. Notani, Sukalpa Biswas +3 more | 2022-01-11 |
| 10777252 | System and method for performing per-bank memory refresh | Gregory S. Mathews, Kai Lun Hsuing, Shane J. Keil | 2020-09-15 |
| 10545701 | Memory arbitration techniques based on latency tolerance | Gregory S. Mathews, Kai Lun Hsiung, Lakshmi Narasimha Murthy Nukala, Rakesh L. Notani, Sukalpa Biswas +3 more | 2020-01-28 |
| 10510396 | Method and apparatus for interrupting memory bank refresh | Rakesh L. Notani, Kai Lun Hsiung | 2019-12-17 |
| 7523342 | Data and control integrity for transactions in a computer system | Thomas M. Wicki | 2009-04-21 |
| 7062611 | Dirty data protection for cache memories | — | 2006-06-13 |
| 6654942 | Method and system for providing a netlist driven integrated router in a non-netlist driven environment | Sachin Chopra, Kong-Fal Woo, Peter Lai, Srirarm Satakopan, Hsiu-Nien Chen +2 more | 2003-11-25 |
| 6397315 | Processor interface chip for dual-microprocessor processor system | Mizanur Rahman, Fred C. Sabernick, Jeff A. Sprouse, Martin J. Grosz, Russell M. Rector | 2002-05-28 |
| 5778171 | Processor interface chip for dual-microprocessor processor system | Mizanur Rahman, Fred C. Sabernick, Jeff A. Sprouse, Martin J. Grosz, Russell M. Rector | 1998-07-07 |
| 5590337 | Processor interface chip for dual-microprocessor processor system | Mizanur Rahman, Fred C. Sabernick, Jeff A. Sprouse, Martin J. Grosz, Russell M. Rector | 1996-12-31 |
| 5539890 | Microprocessor interface apparatus having a boot address relocator, a request pipeline, a prefetch queue, and an interrupt filter | Mizanur Rahman, Fred C. Sabernick, Jeff A. Sprouse, Martin J. Grosz, Russell M. Rector | 1996-07-23 |
| 5435001 | Method of state determination in lock-stepped processors | Mizanur Rahman, Fred C. Sabernick, Jeff A. Sprouse, Martin J. Grosz, Russell M. Rector | 1995-07-18 |
| 5293123 | Pseudo-Random scan test apparatus | Albert Jordan, David J. Garcia | 1994-03-08 |
| 5032983 | Entry point mapping and skipping method and apparatus | Daniel E. Lenoski | 1991-07-16 |
| 4843608 | Cross-coupled checking circuit | Daniel E. Lenoski | 1989-06-27 |