| 7284168 |
Method and system for testing RAM redundant integrated circuits |
Todd W. Mellinger, David Newsome |
2007-10-16 |
| 7152192 |
System and method of testing a plurality of memory blocks of an integrated circuit in parallel |
Karl Brummel, Todd W. Mellinger |
2006-12-19 |
| 7055074 |
Device to inhibit duplicate cache repairs |
Brian Hughes, Warren Howlett |
2006-05-30 |
| 6944807 |
Method and apparatus for achieving higher product yields by using fractional portions of imbedded memory arrays |
Jonathan Lachman, Warren Howlett |
2005-09-13 |
| 6940778 |
System and method for reducing leakage in memory cells using wordline control |
Todd W. Mellinger, Jonathan Lachman |
2005-09-06 |
| 6380779 |
Edge-triggered, self-resetting pulse generator |
Jonathan Lachman, Jim Peterson |
2002-04-30 |
| 6321320 |
Flexible and programmable BIST engine for on-chip memory array testing and characterization |
Jay Fleischman, Jeffery C Brauch |
2001-11-20 |
| 6314039 |
Characterization of sense amplifiers |
Jonathan Lachman, Robert McFarland |
2001-11-06 |
| 6301140 |
Content addressable memory cell with a bootstrap improved compare |
Jonathan Lachman, Todd W. Mellinger |
2001-10-09 |
| 6275442 |
Address decoder and method for ITS accelerated stress testing |
Jonathan Lachman, William J. Queen |
2001-08-14 |
| 6141779 |
Method for automatically programming a redundancy map for a redundant circuit |
Jay Fleischman |
2000-10-31 |
| 5787041 |
System and method for improving a random access memory (RAM) |
Donald R. Weiss |
1998-07-28 |