Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5745721 | Partitioned addressing apparatus for vector/scalar registers | Douglas R. Beard, Andrew Everett Phelps, Michael A. Woodmansee, Richard G. Blewett, Jeffrey A. Lohman +3 more | 1998-04-28 |
| 5717881 | Data processing system for processing one and two parcel instructions | Douglas R. Beard, Andrew Everett Phelps, Michael A. Woodmansee, Richard G. Blewett, Jeffrey A. Lohman +3 more | 1998-02-10 |
| 5706490 | Method of processing conditional branch instructions in scalar/vector processor | Douglas R. Beard, Andrew Everett Phelps, Michael A. Woodmansee, Richard G. Blewett, Jeffrey A. Lohman +3 more | 1998-01-06 |
| 5659706 | Vector/scalar processor with simultaneous processing and instruction cache filling | Douglas R. Beard, Andrew Everett Phelps, Michael A. Woodmansee, Richard G. Blewett, Jeffrey A. Lohman +3 more | 1997-08-19 |
| 5640524 | Method and apparatus for chaining vector instructions | Douglas R. Beard, Andrew Everett Phelps, Michael A. Woodmansee, Richard G. Blewett, Jeffrey A. Lohman +3 more | 1997-06-17 |
| 5623650 | Method of processing a sequence of conditional vector IF statements | Douglas R. Beard, Andrew Everett Phelps, Michael A. Woodmansee, Richard G. Blewett, Jeffrey A. Lohman +3 more | 1997-04-22 |
| 5598547 | Vector processor having functional unit paths of differing pipeline lengths | Douglas R. Beard, Andrew Everett Phelps, Michael A. Woodmansee, Richard G. Blewett, Jeffrey A. Lohman +3 more | 1997-01-28 |
| 5561784 | Interleaved memory access system having variable-sized segments logical address spaces and means for dividing/mapping physical address into higher and lower order addresses | Steve S. Chen, George A. Spix, Jimmie R. Wilson, Edward C. Miller, Roger E. Eckert +1 more | 1996-10-01 |
| 5544337 | Vector processor having registers for control by vector resisters | Douglas R. Beard, Andrew Everett Phelps, Michael A. Woodmansee, Richard G. Blewett, Jeffrey A. Lohman +3 more | 1996-08-06 |
| 5430884 | Scalar/vector processor | Douglas R. Beard, Andrew Everett Phelps, Michael A. Woodmansee, Richard G. Blewett, Jeffrey A. Lohman +3 more | 1995-07-04 |
| 5251097 | Packaging architecture for a highly parallel multiprocessor system | Steve S. Chen, Greg W. Pautsch, Michael H. Rabska, Dennis F. Girling, Douglas C. Paffel +5 more | 1993-10-05 |
| 5197130 | Cluster architecture for a highly parallel scalar/vector multiprocessor system | Steve S. Chen, George A. Spix, Jimmie R. Wilson, Edward C. Miller, Roger E. Eckert +1 more | 1993-03-23 |
| 5168547 | Distributed architecture for input/output for a multiprocessor system | Edward C. Miller, Steve S. Chen, George A. Spix, Leonard S. Veil, Mark J. Vogel +1 more | 1992-12-01 |