| 5745721 |
Partitioned addressing apparatus for vector/scalar registers |
Douglas R. Beard, Andrew Everett Phelps, Michael A. Woodmansee, Jeffrey A. Lohman, Alexander A. Silbey +3 more |
1998-04-28 |
| 5717881 |
Data processing system for processing one and two parcel instructions |
Douglas R. Beard, Andrew Everett Phelps, Michael A. Woodmansee, Jeffrey A. Lohman, Alexander A. Silbey +3 more |
1998-02-10 |
| 5706490 |
Method of processing conditional branch instructions in scalar/vector processor |
Douglas R. Beard, Andrew Everett Phelps, Michael A. Woodmansee, Jeffrey A. Lohman, Alexander A. Silbey +3 more |
1998-01-06 |
| 5684671 |
Packaging architecture for a data server |
Forrest B. Hobbs, Scott A. Wentzka, Steve S. Chen, Kitrick B. Sheets, Sheldon D. Stevens |
1997-11-04 |
| 5659706 |
Vector/scalar processor with simultaneous processing and instruction cache filling |
Douglas R. Beard, Andrew Everett Phelps, Michael A. Woodmansee, Jeffrey A. Lohman, Alexander A. Silbey +3 more |
1997-08-19 |
| 5640524 |
Method and apparatus for chaining vector instructions |
Douglas R. Beard, Andrew Everett Phelps, Michael A. Woodmansee, Jeffrey A. Lohman, Alexander A. Silbey +3 more |
1997-06-17 |
| 5623650 |
Method of processing a sequence of conditional vector IF statements |
Douglas R. Beard, Andrew Everett Phelps, Michael A. Woodmansee, Jeffrey A. Lohman, Alexander A. Silbey +3 more |
1997-04-22 |
| 5598547 |
Vector processor having functional unit paths of differing pipeline lengths |
Douglas R. Beard, Andrew Everett Phelps, Michael A. Woodmansee, Jeffrey A. Lohman, Alexander A. Silbey +3 more |
1997-01-28 |
| 5544337 |
Vector processor having registers for control by vector resisters |
Douglas R. Beard, Andrew Everett Phelps, Michael A. Woodmansee, Jeffrey A. Lohman, Alexander A. Silbey +3 more |
1996-08-06 |
| 5430884 |
Scalar/vector processor |
Douglas R. Beard, Andrew Everett Phelps, Michael A. Woodmansee, Jeffrey A. Lohman, Alexander A. Silbey +3 more |
1995-07-04 |