Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12418508 | Inferring cloud network connectivity as a minimal list of firewall rules | Adi Sosnovich, Gil Eliezer Shurek, Shai Doron, Karen Frida Yorav | 2025-09-16 |
| 11321792 | Enforceable contract generation | Sima Nadler, Karen Frida Yorav, Roee Shlomo, Tomer Solomon | 2022-05-03 |
| 10984159 | Hardware verification based on relations between coverage events | Alexander Ivrii, Avi Ziv, Raviv Gal, Haim Kermany | 2021-04-20 |
| 10572624 | Modified design debugging using differential trace back | Erez Barak, Shlomit Koyfman, Eyal Naor, Osher Yifrach | 2020-02-25 |
| 10540469 | Verifying sequential equivalence for randomly initialized designs | Alexander Ivrii, Haim Kermany | 2020-01-21 |
| 9286426 | Method and apparatus for testing | Gabor Bobok, Shlomit Koyfman, Shiri Moran, Gil Eliezer Shurek | 2016-03-15 |
| 8996339 | Incremental formal verification | Hana Chockler, Alexander Ivrii, Arie Matsliah, Shiri Moran | 2015-03-31 |
| 8627273 | Model checking of liveness property in a phase abstracted model | Jason R. Baumgartner, Shaked Flur, Paul Joseph Roessler | 2014-01-07 |
| 8554522 | Detection of design redundancy | Shaked Flur | 2013-10-08 |
| 8417507 | Formal verification of models using concurrent model-reduction and model-checking | Eli Arbel, Shaked Flur, Michael Shamis | 2013-04-09 |
| 8352234 | Model generation based on a constraint and an initial model | Sharon Keidar Barner, Shiri Moran, Sitvanit Ruah, Tatyana Veksler | 2013-01-08 |
| 8244516 | Formal verification of models using concurrent model-reduction and model-checking | Eli Arbel, Shaked Flur, Michael Shamis | 2012-08-14 |
| 8127261 | System for quickly specifying formal verification environments | Gadiel Auerbach, Matan Gal | 2012-02-28 |
| 7131085 | Distributed BDD reordering | Monica Farkash | 2006-10-31 |