Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12034440 | Combination scheme for baseline wander, direct current level shifting, and receiver linear equalization for high speed links | Rajesh Kumar, Edoardo Prete, Gerald R. Talbot, Ethan Crain, Jeffrey Cooper | 2024-07-09 |
| 10644680 | Application of duty cycle correction to a level shifter via a feedback common mode resistor | Milam Paraschou | 2020-05-05 |
| 8619935 | Methods and structure for on-chip clock jitter testing and analysis | Douglas J. Feist | 2013-12-31 |