Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10115459 | Multiple liner interconnects for three dimensional memory devices and method of making thereof | Katsuo Yamada, Peter Rabkin, Jayavel Pachamuthu, Mohan Dunga, Masaaki Higashitani | 2018-10-30 |
| 9847249 | Buried etch stop layer for damascene bit line formation | Yuji Takahashi, Takuya Futase, Noritaka Fukuo, Katsuo Yamada | 2017-12-19 |
| 9799527 | Double trench isolation | Katsuo Yamada, Yuji Takahashi, Takuya Futase, Noritaka Fukuo | 2017-10-24 |
| 9768183 | Source line formation and structure | Shunsuke Akimoto, Hidetoshi Nakamoto, Keita Kumamoto, Hidehito Koseki, Yuji Takahashi +2 more | 2017-09-19 |
| 9466523 | Contact hole collimation using etch-resistant walls | Takuya Futase, Katsuo Yamada, Keita Kumamoto, Hirotada Tobita | 2016-10-11 |
| 9177853 | Barrier layer stack for bit line air gap formation | Takuya Futase, Katsuo Yamada, Noritaka Fukuo, Yuji Takahashi | 2015-11-03 |
| RE45580 | Phase-change nonvolatile memory and manufacturing method therefor | — | 2015-06-23 |
| 8574996 | Method of manufacturing semiconductor device | — | 2013-11-05 |
| 8513638 | Semiconductor device including a phase-change memory element | Isamu Asano, Tsuyoshi Kawagoe, Hiromi Sasaoka, Naoya HIGANO, Yuta Watanabe | 2013-08-20 |
| 8026502 | Phase-change nonvolatile memory and manufacturing method therefor | — | 2011-09-27 |
| 7964935 | Phase change random access memory and semiconductor device | — | 2011-06-21 |