TL

Terry Lines

NS National Semiconductor: 10 patents #172 of 2,238Top 8%
Overall (All Time): #518,708 of 4,157,543Top 15%
10
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
7960240 System and method for providing a dual via architecture for thin film resistors Rodney Hill, Victor Torres, Michael Burger 2011-06-14
7867871 System and method for increasing breakdown voltage of LOCOS isolated devices Richard W. Foote, Alexei Sadovnikov, Andy Strachan 2011-01-11
7829428 Method for eliminating a mask layer during thin film resistor manufacturing Yaojian Leng, Rodney Hill 2010-11-09
7808048 System and method for providing a buried thin film resistor having end caps defined by a dielectric mask Rodney Hill, Victor Torres, William M. Coppock, Richard W. Foote, Tom Bold 2010-10-05
7410879 System and method for providing a dual via architecture for thin film resistors Rodney Hill, Victor Torres, Michael Burger 2008-08-12
7332403 System and method for providing a buried thin film resistor having end caps defined by a dielectric mask Rodney Hill, Victor Torres, William M. Coppock, Richard W. Foote, Tom Bold 2008-02-19
7172973 System and method for selectively modifying a wet etch rate in a large area Richard W. Foote, William M. Coppock, Victor Torres 2007-02-06
7161216 Depletion-mode transistor that eliminates the need to separately set the threshold voltage of the depletion-mode transistor 2007-01-09
7144795 Method for forming a depletion-mode transistor that eliminates the need to separately set the threshold voltage of the depletion-mode transistor 2006-12-05
6703670 Depletion-mode transistor that eliminates the need to separately set the threshold voltage of the depletion-mode transistor 2004-03-09