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Electronic system |
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Systems and methods for junction termination of wide band gap super-junction power devices |
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Systems and methods for junction termination in semiconductor devices |
Stephen Daley Arthur, Michael J. Hartig, Reza Ghandi, David Alan Lilienfeld, Alexander Viktorovich Bolotnikov |
2022-03-08 |
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Systems and methods for junction termination of wide band gap super-junction power devices |
Stephen Daley Arthur, Michael J. Hartig, Reza Ghandi, David Alan Lilienfeld, Alexander Viktorovich Bolotnikov |
2022-02-08 |
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Miniaturized current sensors |
— |
2021-04-06 |
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Integrated vertical and lateral semiconductor devices |
— |
2020-08-11 |
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Sputtering system and method for forming a metal layer on a semiconductor device |
Stacey Joy Kennerly, David Alan Lilienfeld, Robert Dwayne Gossman, Gregory Dudoff |
2019-07-16 |
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Transient voltage suppression devices with symmetric breakdown characteristics |
Reza Ghandi, David Alan Lilienfeld, Avinash Srikrishnan Kashyap, Alexander Viktorovich Bolotnikov |
2018-07-03 |
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Method for manufacturing SiC wafer fit for integration with power device manufacturing technology |
Darren Hansen, Mark Loboda, Ian Manning, Kevin Moeggenborg, Stephan Mueller +3 more |
2018-06-19 |
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Method for manufacturing SiC wafer fit for integration with power device manufacturing technology |
Darren Hansen, Mark Loboda, Ian Manning, Kevin Moeggenborg, Stephan Mueller +3 more |
2016-03-08 |
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Method to manufacture large uniform ingots of silicon carbide by sublimation/condensation processes |
Mark Loboda, Seung Ho Park |
2014-07-01 |
| 7960240 |
System and method for providing a dual via architecture for thin film resistors |
Rodney Hill, Michael Burger, Terry Lines |
2011-06-14 |
| 7808048 |
System and method for providing a buried thin film resistor having end caps defined by a dielectric mask |
Rodney Hill, William M. Coppock, Richard W. Foote, Terry Lines, Tom Bold |
2010-10-05 |
| 7585775 |
System and method for faceting a masking layer in a plasma etch to slope a feature edge |
Thomas Bold, Rodney Hill |
2009-09-08 |
| 7456097 |
System and method for faceting via top corners to improve metal fill |
Rodney Hill, Richard W. Foote |
2008-11-25 |
| 7410879 |
System and method for providing a dual via architecture for thin film resistors |
Rodney Hill, Michael Burger, Terry Lines |
2008-08-12 |
| 7332403 |
System and method for providing a buried thin film resistor having end caps defined by a dielectric mask |
Rodney Hill, William M. Coppock, Richard W. Foote, Terry Lines, Tom Bold |
2008-02-19 |
| 7172973 |
System and method for selectively modifying a wet etch rate in a large area |
Richard W. Foote, William M. Coppock, Terry Lines |
2007-02-06 |
| 7115500 |
System and method for providing a dry-wet-dry etch procedure to create a sidewall profile of a via |
— |
2006-10-03 |
| 6306675 |
Method for forming a low-defect epitaxial layer in the fabrication of semiconductor devices |
Ignatius S. T. Tsong, David J. Smith, John Edwards, R. Bruce Doak |
2001-10-23 |