Issued Patents All Time
Showing 25 most recent of 58 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12423181 | Low complexity system and method for detection and correction of data with additional metadata from corruption | Majid Anaraki Nemati, Brett K. Dodds | 2025-09-23 |
| 12379992 | System and method for protecting data | Majid Anaraki Nemati, Brett K. Dodds | 2025-08-05 |
| 12308857 | Devices, systems, and methods for encoding and decoding codewords | Brett K. Dodds | 2025-05-20 |
| 12235760 | Apparatus having selectively-activated termination circuitry | — | 2025-02-25 |
| 12111725 | Read retry scratch space | Rahul Mitchell Jairaj, Mark Hawes | 2024-10-08 |
| 11650653 | Apparatuses and methods of entering unselected memories into a different power mode during multi-memory operation | Ryan G. Fisher | 2023-05-16 |
| 11586498 | Read retry scratch space | Rahul Mitchell Jairaj, Mark Hawes | 2023-02-21 |
| 11556251 | Apparatuses and methods to control memory operations on buffers | Ali Mohammadzadeh, Jung Sheng Hoei, Dheeraj Srinivasan | 2023-01-17 |
| 11416154 | Partially written block treatment | Sivagnanam Parthasarathy, Lucia Botticchio, Walter Di Francesco, Vamshi K. Indavarapu, Gianfranco Valeri +4 more | 2022-08-16 |
| 11379366 | Memory devices having selectively-activated termination devices | — | 2022-07-05 |
| 11264099 | Apparatuses and methods for automated dynamic word line start voltage | Dheeraj Srinivasan, Jeffrey Ming-Hung Tsai, Ali Mohammadzadeh | 2022-03-01 |
| 11238949 | Memory devices configured to test data path integrity | — | 2022-02-01 |
| 11107549 | At-risk memory location identification and management | Timothy B. Cowles | 2021-08-31 |
| 11099626 | Apparatuses and methods of entering unselected memories into a different power mode during multi-memory operation | Ryan G. Fisher | 2021-08-24 |
| 11031081 | Apparatus having memory arrays and having trim registers associated with memory array access operation commands | — | 2021-06-08 |
| 10936210 | Apparatuses and methods to control memory operations on buffers | Ali Mohammadzadeh, Jung Sheng Hoei, Dheeraj Srinivasan | 2021-03-02 |
| 10877679 | Partially written block treatment | Sivagnanam Parthasarathy, Lucia Botticchio, Walter Di Francesco, Vamshi K. Indavarapu, Gianfranco Valeri +4 more | 2020-12-29 |
| 10860479 | Line termination methods | — | 2020-12-08 |
| 10832779 | Apparatuses and methods for automated dynamic word line start voltage | Dheeraj Srinivasan, Jeffrey Ming-Hung Tsai, Ali Mohammadzadeh | 2020-11-10 |
| 10622084 | Methods of verifying data path integrity | — | 2020-04-14 |
| 10468105 | Apparatus having memory arrays and having trim registers associated with memory array access operation commands | — | 2019-11-05 |
| 10423350 | Partially written block treatment | Sivagnanam Parthasarathy, Lucia Botticchio, Walter Di Francesco, Vamshi K. Indavarapu, Gianfranco Valeri +4 more | 2019-09-24 |
| 10388379 | Apparatuses and methods for automated dynamic word line start voltage | Dheeraj Srinivasan, Jeffrey Ming-Hung Tsai, Ali Mohammadzadeh | 2019-08-20 |
| 10372353 | Apparatuses and methods to control memory operations on buffers | Ali Mohammadzadeh, Jung Sheng Hoei, Dheeraj Srinivasan | 2019-08-06 |
| 10325635 | Devices, methods, and systems supporting on unit termination | — | 2019-06-18 |