Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12306247 | System and method for optimizing fault coverage based on optimized test point insertion determinations for logical circuits | Yang Sun, Soham Roy, Vishwani D. Agrawal | 2025-05-20 |
| 10545190 | Circuit structures to resolve random testability | Raghu G. GopalaKrishnaSetty, Mary P. Kusko | 2020-01-28 |
| 10527674 | Circuit structures to resolve random testability | Raghu G. GopalaKrishnaSetty, Mary P. Kusko | 2020-01-07 |
| 10528399 | Techniques for faster loading of data for accelerators | Mark S. Fredrickson, John Michael Borkenhagen, Michael A. Muston, John D. Irish | 2020-01-07 |
| 10502782 | Synthesis for random testability using unreachable states in integrated circuits | Victor N. Kravets, Haoxing Ren, Mary P. Kusko | 2019-12-10 |
| 9390292 | Encrypted digital circuit description allowing circuit simulation | Parameswaran Ramanathan, Kewal Saluja | 2016-07-12 |