SY

Sharada Yeluri

JN Juniper Networks: 20 patents #111 of 2,602Top 5%
Oracle: 4 patents #3,141 of 14,854Top 25%
Overall (All Time): #170,306 of 4,157,543Top 5%
24
Patents All Time

Issued Patents All Time

Showing 1–24 of 24 patents

Patent #TitleCo-InventorsDate
11991081 Micro SID packet processing Nancy Y. Shaw, Venkatraman Chandrasekaran, Sri Karthik Goud Gadela, Swamy Sadashivaiah Renu Kananda 2024-05-21
11477119 Micro SID packet processing Nancy Y. Shaw, Venkatraman Chandrasekaran, Sri Karthik Goud Gadela, Swamy Sadashivaiah Renu Kananda 2022-10-18
9116814 Use of cache to reduce memory bandwidth pressure with processing pipeline Jianhui Huang, Jean-Marc Frailong, Jeffrey G. Libby, Anurag P. Gupta, Paul Coelho 2015-08-25
9026424 Emulation of multiple instruction sets Jeffrey G. Libby, Jean-Marc Frailong, Jianhui Huang, John Keen, Rajesh Nair 2015-05-05
8799909 System and method for independent synchronous and asynchronous transaction requests Jeffrey G. Libby, Jean-Marc Frailong, Avanindra Godbole, Anurag P. Gupta, John Keen 2014-08-05
8627007 Use of cache to reduce memory bandwidth pressure with processing pipeline Jianhui Huang, Jean-Marc Frailong, Jeffrey G. Libby, Anurag P. Gupta, Paul Coelho 2014-01-07
8621100 Merge systems and methods for transmit system interfaces Kevin Clark, Shahriar Ilislamloo, Chung Lau 2013-12-31
8520675 System and method for efficient packet replication Jean-Marc Frailong, Jeffrey G. Libby, Anurag P. Gupta, John Keen, Rajesh Nair +1 more 2013-08-27
8498306 Maintaining data unit order in a network switching device Jean-Marc Frailong, Anurag P. Gupta, Jeffrey G. Libby, Edwin Su 2013-07-30
8332622 Branching to target address by adding value selected from programmable offset table to base address specified in branch instruction Anurag P. Gupta, John Keen, Jeffrey G. Libby, Jean-Marc Frailong, Avanindra Godbole 2012-12-11
8078849 Fast execution of branch instruction with multiple conditional expressions using programmable branch offset table Jeffrey G. Libby, Jean-Marc Frailong, Anurag P. Gupta, John Keen, Avanindra Godbole 2011-12-13
8069023 Hardware support for instruction set emulation Jean-Marc Frailong, Jeffrey G. Libby, Jianhui Huang, Rajesh Nair, John Keen 2011-11-29
8015312 Scheduler for transmit system interfaces Kevin Clark, Shahriar Ilislamloo 2011-09-06
7924860 Maintaining data unit order in a network switching device Jean-Marc Frailong, Anurag P. Gupta, Jeffrey G. Libby, Edwin Su 2011-04-12
7809853 Scheduler for transmit system interfaces Kevin Clark, Shahriar Ilislamloo 2010-10-05
7769016 Flow control for multi-level buffering schemes Raymond Chan, Shahriar Ilislamloo, Varkey Paul Alapat, Shunn-Cheng Jang 2010-08-03
7519728 Merge systems and methods for transmit systems interfaces Kevin Clark, Shahriar Ilislamloo, Chung Lau 2009-04-14
7508831 Flow control systems and methods for multi-level buffering schemes Raymond Chan, Shahriar Ilislamloo, Varkey Paul Alapat, Shunn-Cheng Jang 2009-03-24
7224691 Flow control systems and methods for multi-level buffering schemes Raymond Chan, Shahriar Ilislamloo, Varkey Paul Alapat, Shunn-Cheng Jang 2007-05-29
7089405 Index-based scoreboarding system and method 2006-08-08
7085849 Scheduler systems and methods for transmit system interfaces Kevin Clark, Shahriar Ilislamloo 2006-08-01
6928534 Forwarding load data to younger instructions in annex 2005-08-09
6542988 Sending both a load instruction and retrieved data from a load buffer to an annex prior to forwarding the load data to register file Marc Tremblay, Jeffrey Meng Wah Chan, Subramania Sudharsanan, Biyu Pan 2003-04-01
6279100 Local stall control method and structure in a microprocessor Marc Tremblay 2001-08-21