Issued Patents All Time
Showing 1–25 of 25 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9391958 | Hardware implementation of complex firewalls using chaining technique | Venkatasubramanian Swaminathan, Deepak Goel, Jianhui Huang, Jean-Marc Frailong, Srinivasan Jagannadhan +1 more | 2016-07-12 |
| 9098262 | Efficient arithimetic logic units | Jean-Marc Frailong, Pradeep Sindhu, Jeffrey G. Libby, Jian Hui Huang, Rajesh Nair | 2015-08-04 |
| 9026424 | Emulation of multiple instruction sets | Jeffrey G. Libby, Jean-Marc Frailong, Sharada Yeluri, Jianhui Huang, Rajesh Nair | 2015-05-05 |
| 8938469 | Dynamically adjusting hash table capacity | Jean-Marc Frailong, Deepak Goel | 2015-01-20 |
| 8886827 | Flow cache mechanism for performing packet flow lookups in a network device | Deepak Goel, Venkatasubramanian Swaminathan | 2014-11-11 |
| 8880856 | Efficient arithmetic logic units | Jean-Marc Frailong, Pradeep Sindhu, Jeffrey G. Libby, Jian Hui Huang, Rajesh Nair | 2014-11-04 |
| 8799507 | Longest prefix match searches with variable numbers of prefixes | Jean-Marc Frailong, Deepak Goel, Srinivasan Jagannadhan, Srilakshmi Adusumalli | 2014-08-05 |
| 8799909 | System and method for independent synchronous and asynchronous transaction requests | Jeffrey G. Libby, Jean-Marc Frailong, Avanindra Godbole, Sharada Yeluri, Anurag P. Gupta | 2014-08-05 |
| 8800021 | Hardware implementation of complex firewalls using chaining technique | Venkatasubramanian Swaminathan, Deepak Goel, Jianhui Huang, Jean-Marc Frailong, Srinivasan Jagannadhan +1 more | 2014-08-05 |
| 8630294 | Dynamic bypass mechanism to alleviate bloom filter bank contention | Jianhui Huang, Deepak Goel, David Skinner, Venkatasubramanian Swaminathan | 2014-01-14 |
| 8583851 | Convenient, flexible, and efficient management of memory space and bandwidth | Anjan Venkatramani, Srinivas Perla | 2013-11-12 |
| 8520675 | System and method for efficient packet replication | Jean-Marc Frailong, Jeffrey G. Libby, Anurag P. Gupta, Rajesh Nair, Avanindra Godbole +1 more | 2013-08-27 |
| 8397010 | Convenient, flexible, and efficient management of memory space and bandwidth | Anjan Venkatramani, Srinivas Perla | 2013-03-12 |
| 8332622 | Branching to target address by adding value selected from programmable offset table to base address specified in branch instruction | Anurag P. Gupta, Jeffrey G. Libby, Jean-Marc Frailong, Avanindra Godbole, Sharada Yeluri | 2012-12-11 |
| 8327057 | Ordering write bursts to memory | Anjan Venkatramani, Srinivas Perla | 2012-12-04 |
| 8285914 | Banked memory arbiter for control memory | Anjan Venkatramani, Srinivas Perla | 2012-10-09 |
| 8225027 | Mapping address bits to improve spread of banks | Anjan Venkatramani, Srinivas Perla | 2012-07-17 |
| 8078791 | Ordering refresh requests to memory | Srinivas Perla, Anjan Venkatramani | 2011-12-13 |
| 8078849 | Fast execution of branch instruction with multiple conditional expressions using programmable branch offset table | Jeffrey G. Libby, Jean-Marc Frailong, Anurag P. Gupta, Avanindra Godbole, Sharada Yeluri | 2011-12-13 |
| 8069023 | Hardware support for instruction set emulation | Jean-Marc Frailong, Jeffrey G. Libby, Jianhui Huang, Sharada Yeluri, Rajesh Nair | 2011-11-29 |
| 7996597 | Mapping address bits to improve spread of banks | Anjan Venkatramani, Srinivas Perla | 2011-08-09 |
| 6578115 | Method and apparatus for handling invalidation requests to processors not present in a computer system | David Edward McCracken, Martin M. Deneroff, Gregory Michael Thorson | 2003-06-10 |
| 6564277 | Method and system for handling interrupts in a node controller without attached processors | Jeffrey G. Libby, Swaminathan Venkataraman | 2003-05-13 |
| 6457146 | Method and apparatus for processing errors in a computer system | Azmeer Salleh | 2002-09-24 |
| 6339812 | Method and apparatus for handling invalidation requests to processors not present in a computer system | David Edward McCracken, Martin M. Deneroff, Gregory Michael Thorson | 2002-01-15 |