Issued Patents All Time
Showing 1–25 of 29 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12423010 | Memory devices with multiple sets of latencies and methods for operating the same | Dean D. Gans, Yoshiro Riho, Osamu Nagashima | 2025-09-23 |
| 12367133 | Apparatuses and methods for training operations | Osamu Nagashima, Yoshinori Matsui, Keun Soo Song, Hiroki Takahashi | 2025-07-22 |
| 12182397 | Apparatuses and methods for configurable memory array bank architectures | Dean D. Gans | 2024-12-31 |
| 11914874 | Memory devices with multiple sets of latencies and methods for operating the same | Dean D. Gans, Yoshiro Riho, Osamu Nagashima | 2024-02-27 |
| 11698726 | Apparatuses and methods for configurable memory array bank architectures | Dean D. Gans | 2023-07-11 |
| 11209981 | Apparatuses and methods for configurable memory array bank architectures | Dean D. Gans | 2021-12-28 |
| 11150821 | Memory devices with multiple sets of latencies and methods for operating the same | Dean D. Gans, Yoshiro Riho, Osamu Nagashima | 2021-10-19 |
| 11007663 | Device for releasing catch between precut substrates, robot, and robot system therefor | — | 2021-05-18 |
| 10976945 | Memory devices with multiple sets of latencies and methods for operating the same | Dean D. Gans, Yoshiro Riho, Osamu Nagashima | 2021-04-13 |
| 10850342 | Dissimilar-metal joining tool | Toshihiko Inoue | 2020-12-01 |
| 10788985 | Apparatuses and methods for configurable memory array bank architectures | Dean D. Gans | 2020-09-29 |
| 10481819 | Memory devices with multiple sets of latencies and methods for operating the same | Dean D. Gans, Yoshiro Riho, Osamu Nagashima | 2019-11-19 |
| 10416041 | Combustion state parameter calculation method for internal combustion engine | Shusuke Akazaki, Taisuke Inoue | 2019-09-17 |
| 10372330 | Apparatuses and methods for configurable memory array bank architectures | Dean D. Gans | 2019-08-06 |
| 10289095 | Wire electric discharge machining system | — | 2019-05-14 |
| 10049722 | Apparatuses and methods for a memory device with dual common data I/O lines | Toshio Sugano, Atsushi Hiraishi, Atsuo Koshizuka | 2018-08-14 |
| 9837137 | Semiconductor device | Toshio Sugano, Atsushi Hiraishi | 2017-12-05 |
| 9805786 | Apparatuses and methods for a memory device with dual common data I/O lines | Toshio Sugano, Atsushi Hiraishi, Atsuo Koshizuka | 2017-10-31 |
| 9702787 | In-cylinder pressure detecting apparatus for internal combustion engine | Shusuke Akazaki | 2017-07-11 |
| 9540186 | Conveyor system and conveyance method | Yoshitake Furuya | 2017-01-10 |
| 9429091 | Fuel injection apparatus for internal combustion engine | Shusuke Akazaki, Kaoru Akiyama | 2016-08-30 |
| 9368185 | Semiconductor device | Toshio Sugano, Atsushi Hiraishi | 2016-06-14 |
| 8422263 | Load reduced memory module and memory system including the same | Toshio Sugano, Atsushi Hiraishi, Fumiyuki Osanai, Masayuki Nakamura, Hiroki Fujisawa | 2013-04-16 |
| 8198549 | Multi-layer printed wiring board | Toshio Sugano, Atsushi Hiraishi | 2012-06-12 |
| 7986037 | Low noise semiconductor device | Yutaka Uematsu, Tatsuya Saito, Hideki Osaka, Yoji Nishio | 2011-07-26 |